From: Jagan Teki Date: Mon, 20 Apr 2020 10:06:06 +0000 (+0530) Subject: mtd: spi-nor: Enable QE bit for ISSI flash X-Git-Tag: v2020.07-rc2~21^2~8 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=5bf3f3dd11db4048d7ad60f2ee210dc50da26051;p=oweals%2Fu-boot.git mtd: spi-nor: Enable QE bit for ISSI flash Enable QE bit for ISSI flash chips. QE enablement logic is similar to what Macronix has, so reuse the existing code itself. Cc: Sagar Shrikant Kadam Signed-off-by: Jagan Teki --- diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 3bf8ddfb9d..e840c60f27 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -325,6 +325,7 @@ static int set_4byte(struct spi_nor *nor, const struct flash_info *info, case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; + case SNOR_MFR_ISSI: case SNOR_MFR_MACRONIX: case SNOR_MFR_WINBOND: if (need_wren) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index ec144a08d8..233fdc341a 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -22,6 +22,7 @@ #define SNOR_MFR_INTEL CFI_MFR_INTEL #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro <--> Micron */ #define SNOR_MFR_MICRON CFI_MFR_MICRON /* ST Micro <--> Micron */ +#define SNOR_MFR_ISSI CFI_MFR_PMC #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX #define SNOR_MFR_SPANSION CFI_MFR_AMD #define SNOR_MFR_SST CFI_MFR_SST