From: Yangbo Lu Date: Thu, 28 May 2015 09:23:55 +0000 (+0530) Subject: armv8/ls2085ardb: add hwconfig setting for eSDHC X-Git-Tag: v2015.10-rc1~183^2~50 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=5a4d744c905258433cc15792989a7abba9b1efe0;p=oweals%2Fu-boot.git armv8/ls2085ardb: add hwconfig setting for eSDHC Add hwconfig setting for eSDHC since it shares some pins with other IP block. Signed-off-by: Yangbo Lu Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- diff --git a/board/freescale/ls2085ardb/ls2085ardb.c b/board/freescale/ls2085ardb/ls2085ardb.c index 6cb7b13422..e0a8a4158c 100644 --- a/board/freescale/ls2085ardb/ls2085ardb.c +++ b/board/freescale/ls2085ardb/ls2085ardb.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -21,8 +22,15 @@ #include "../common/qixis.h" #include "ls2085ardb_qixis.h" +#define PIN_MUX_SEL_SDHC 0x00 + +#define SET_SDHC_MUX_SEL(reg, value) ((reg & 0xf0) | value) DECLARE_GLOBAL_DATA_PTR; +enum { + MUX_TYPE_SDHC, +}; + unsigned long long get_qixis_addr(void) { unsigned long long addr; @@ -129,6 +137,34 @@ int board_early_init_f(void) return 0; } +int config_board_mux(int ctrl_type) +{ + u8 reg5; + + reg5 = QIXIS_READ(brdcfg[5]); + + switch (ctrl_type) { + case MUX_TYPE_SDHC: + reg5 = SET_SDHC_MUX_SEL(reg5, PIN_MUX_SEL_SDHC); + break; + default: + printf("Wrong mux interface type\n"); + return -1; + } + + QIXIS_WRITE(brdcfg[5], reg5); + + return 0; +} + +int misc_init_r(void) +{ + if (hwconfig("sdhc")) + config_board_mux(MUX_TYPE_SDHC); + + return 0; +} + void detail_board_ddr_info(void) { puts("\nDDR "); diff --git a/include/configs/ls2085ardb.h b/include/configs/ls2085ardb.h index 920560c642..ecc445e923 100644 --- a/include/configs/ls2085ardb.h +++ b/include/configs/ls2085ardb.h @@ -284,6 +284,8 @@ unsigned long get_board_sys_clk(void); #define CONFIG_DOS_PARTITION #endif +#define CONFIG_MISC_INIT_R + /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \