From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 12 Dec 2018 14:12:39 +0000 (-0800)
Subject: riscv: Add indirect stringification to csr_xxx ops
X-Git-Tag: v2019.01-rc3~20^2~12
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=57fe5c64cb078c25c81cf40b5b268dc6857dc00c;p=oweals%2Fu-boot.git

riscv: Add indirect stringification to csr_xxx ops

With current csr_xxx ops, we cannot pass a macro to parameter
'csr', hence we need add another level to allow the parameter
to be a macro itself, aka indirect stringification.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
---

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 29624fdbb5..86136f542c 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -61,10 +61,12 @@
 
 #ifndef __ASSEMBLY__
 
+#define xcsr(csr)	#csr
+
 #define csr_swap(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrw %0, " #csr ", %1"		\
+	__asm__ __volatile__ ("csrrw %0, " xcsr(csr) ", %1"	\
 			      : "=r" (__v) : "rK" (__v)		\
 			      : "memory");			\
 	__v;							\
@@ -73,7 +75,7 @@
 #define csr_read(csr)						\
 ({								\
 	register unsigned long __v;				\
-	__asm__ __volatile__ ("csrr %0, " #csr			\
+	__asm__ __volatile__ ("csrr %0, " xcsr(csr)		\
 			      : "=r" (__v) :			\
 			      : "memory");			\
 	__v;							\
@@ -82,7 +84,7 @@
 #define csr_write(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrw " #csr ", %0"		\
+	__asm__ __volatile__ ("csrw " xcsr(csr) ", %0"		\
 			      : : "rK" (__v)			\
 			      : "memory");			\
 })
@@ -90,7 +92,7 @@
 #define csr_read_set(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrs %0, " #csr ", %1"		\
+	__asm__ __volatile__ ("csrrs %0, " xcsr(csr) ", %1"	\
 			      : "=r" (__v) : "rK" (__v)		\
 			      : "memory");			\
 	__v;							\
@@ -99,7 +101,7 @@
 #define csr_set(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrs " #csr ", %0"		\
+	__asm__ __volatile__ ("csrs " xcsr(csr) ", %0"		\
 			      : : "rK" (__v)			\
 			      : "memory");			\
 })
@@ -107,7 +109,7 @@
 #define csr_read_clear(csr, val)				\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrrc %0, " #csr ", %1"		\
+	__asm__ __volatile__ ("csrrc %0, " xcsr(csr) ", %1"	\
 			      : "=r" (__v) : "rK" (__v)		\
 			      : "memory");			\
 	__v;							\
@@ -116,7 +118,7 @@
 #define csr_clear(csr, val)					\
 ({								\
 	unsigned long __v = (unsigned long)(val);		\
-	__asm__ __volatile__ ("csrc " #csr ", %0"		\
+	__asm__ __volatile__ ("csrc " xcsr(csr) ", %0"		\
 			      : : "rK" (__v)			\
 			      : "memory");			\
 })