From: Michal Simek Date: Fri, 28 Jun 2019 11:16:10 +0000 (+0200) Subject: arm64: zynqmp: Sync names for SC with Versal X-Git-Tag: v2020.01-rc1~8^2~65 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=50d92833477e;p=oweals%2Fu-boot.git arm64: zynqmp: Sync names for SC with Versal ZynqMP based System controller is present on Versal boards. This patch is aligning names with Versal to follow the spec. Signed-off-by: Michal Simek --- diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3b8dc2f56f..d9aaf128ad 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -250,9 +250,9 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ avnet-ultra96-rev1.dtb \ avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dtb \ zynqmp-a2197-revA.dtb \ - zynqmp-a2197-g-revA.dtb \ - zynqmp-a2197-m-revA.dtb \ - zynqmp-a2197-p-revA.dtb \ + zynqmp-g-a2197-00-revA.dtb \ + zynqmp-m-a2197-01-revA.dtb \ + zynqmp-p-a2197-00-revA.dtb \ zynqmp-mini.dtb \ zynqmp-mini-emmc0.dtb \ zynqmp-mini-emmc1.dtb \ diff --git a/arch/arm/dts/zynqmp-a2197-g-revA.dts b/arch/arm/dts/zynqmp-a2197-g-revA.dts deleted file mode 100644 index c6072b5f42..0000000000 --- a/arch/arm/dts/zynqmp-a2197-g-revA.dts +++ /dev/null @@ -1,282 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx Versal a2197 RevA System Controller on MGT - * - * (C) Copyright 2019, Xilinx, Inc. - * - * Michal Simek - */ -/dts-v1/; - -#include "zynqmp.dtsi" -#include "zynqmp-clk-ccf.dtsi" -#include - -/ { - model = "Versal System Controller on a2197 MGT Char board RevA"; - compatible = "xlnx,zynqmp-a2197-g-revA", "xlnx,zynqmp-a2197-revA", - "xlnx,zynqmp-a2197", "xlnx,zynqmp"; - - aliases { - ethernet0 = &gem0; - gpio0 = &gpio; - i2c0 = &i2c0; - mmc0 = &sdhci0; - rtc0 = &rtc; - serial0 = &uart0; - serial1 = &dcc; - usb0 = &usb0; - }; - - chosen { - bootargs = "earlycon"; - stdout-path = "serial0:115200n8"; - xlnx,eeprom = <&eeprom>; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - }; -}; - -&sdhci0 { /* emmc MIO 13-23 16GB */ - status = "okay"; - non-removable; - disable-wp; - bus-width = <8>; - xlnx,mio_bank = <0>; -}; - -&uart0 { /* uart0 MIO38-39 */ - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&gem0 { /* eth MDIO 76/77 */ - status = "okay"; - phy-handle = <&phy0>; - phy-mode = "sgmii"; - is-internal-pcspma; - phy0: phy@0 { /* marwell m88e1512 */ - reg = <0>; - reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; -/* xlnx,phy-type = ; */ - }; -/* phy-names = "..."; - phys = <&lane0 PHY_TYPE_SGMII ... > - Note: lane0 sgmii/lane1 usb3 */ -}; - -&gpio { - status = "okay"; - gpio-line-names = "", "", "", "", "", /* 0 - 4 */ - "", "", "", "", "", /* 5 - 9 */ - "", "", "", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ - "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ - "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ - "", "", "", "", "", /* 25 - 29 */ - "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ - "LP_I2C0_PMC_SDA", "", "", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ - "", "", "ETH_RESET_B", "", "", /* 40 - 44 */ - "", "", "", "", "", /* 45 - 49 */ - "", "", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ - "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ - "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "", /* 60 - 64 */ - "", "", "", "", "", /* 65 - 69 */ - "", "", "", "", "", /* 70 - 74 */ - "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ - "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ - "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ - "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ - "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ - "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ - "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ - "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */ - "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ - "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ - "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ - "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */ - "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */ - "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ - "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ - "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ - "", "", "", "", "", /* 150 - 154 */ - "", "", "", "", "", /* 155 - 159 */ - "", "", "", "", "", /* 160 - 164 */ - "", "", "", "", "", /* 165 - 169 */ - "", "", "", ""; /* 170 - 174 */ -}; - -&i2c0 { /* MIO 34-35 - can't stay here */ - status = "okay"; - clock-frequency = <400000>; - scl-gpios = <&gpio 34 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; - i2c-mux@74 { /* u94 */ - compatible = "nxp,pca9548"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x74>; - /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - /* Use for storing information about SC board */ - eeprom: eeprom@50 { /* u96 - 24LC32A - 256B */ - compatible = "atmel,24c32"; - reg = <0x50>; - }; - }; - i2c@1 { /* CM_I2C_SCL - Samtec */ - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - }; - i2c@2 { /* PMBUS - AFX_PMBUS */ - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - tps544@d { /* u85 */ - compatible = "ti,tps544b25"; - reg = <0xd>; - }; - tps544@10 { /* u73 */ - compatible = "ti,tps544b25"; - reg = <0x10>; - }; - tps544@11 { /* u76 */ - compatible = "ti,tps544b25"; - reg = <0x11>; - }; - tps544@12 { /* u77 */ - compatible = "ti,tps544b25"; - reg = <0x12>; - }; - tps544@13 { /* u80 */ - compatible = "ti,tps544b25"; - reg = <0x13>; - }; - tps544@14 { /* u81 */ - compatible = "ti,tps544b25"; - reg = <0x14>; - }; - tps544@15 { /* u83 */ - compatible = "ti,tps544b25"; - reg = <0x15>; - }; - tps544@16 { /* u63 */ - compatible = "ti,tps544b25"; - reg = <0x16>; - }; - tps544@17 { /* u66 */ - compatible = "ti,tps544b25"; - reg = <0x17>; - }; - tps544@18 { /* u67 */ - compatible = "ti,tps544b25"; - reg = <0x18>; - }; - tps544@19 { /* u69 */ - compatible = "ti,tps544b25"; - reg = <0x19>; - }; - tps544@1d { /* u88 */ - compatible = "ti,tps544b25"; - reg = <0x1d>; - }; - tps544@1e { /* u89 */ - compatible = "ti,tps544b25"; - reg = <0x1e>; - }; - tps544@1f { /* u87 */ - compatible = "ti,tps544b25"; - reg = <0x1f>; - }; - tps544@20 { /* u71 */ - compatible = "ti,tps544b25"; - reg = <0x20>; - }; - ina226@40 { /* u74 */ - compatible = "ti,ina226"; - reg = <0x40>; - shunt-resistor = <1000>; - }; - ina226@41 { /* u75 */ - compatible = "ti,ina226"; - reg = <0x41>; - shunt-resistor = <1000>; - }; - ina226@42 { /* u78 */ - compatible = "ti,ina226"; - reg = <0x42>; - shunt-resistor = <5000>; - }; - ina226@43 { /* u79 */ - compatible = "ti,ina226"; - reg = <0x43>; - shunt-resistor = <1000>; - }; - ina226@44 { /* u82 */ - compatible = "ti,ina226"; - reg = <0x44>; - shunt-resistor = <1000>; - }; - ina226@45 { /* u84 */ - compatible = "ti,ina226"; - reg = <0x45>; - shunt-resistor = <5000>; - }; - tps53681@c0 { /* u53 - FIXME name - don't know what it does - also vcc_io_soc */ - compatible = "ti,tps53681"; /* FIXME no linux driver */ - reg = <0xc0>; - }; - }; - i2c@3 { /* fmc1 via JA2G */ - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - eeprom_fmc1: eeprom@50 { /* on FMC */ - compatible = "atmel,24c04"; - reg = <0x50>; - }; - }; - i2c@4 { /* fmc2 via JA3G */ - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - eeprom_fmc2: eeprom@50 { /* on FMC */ - compatible = "atmel,24c04"; - reg = <0x50>; - }; - }; - i2c@5 { /* fmc3 via JA4G */ - #address-cells = <1>; - #size-cells = <0>; - reg = <5>; - eeprom_fmc3: eeprom@50 { /* on FMC */ - compatible = "atmel,24c04"; - reg = <0x50>; - }; - }; - i2c@6 { /* ddr dimm */ - #address-cells = <1>; - #size-cells = <0>; - reg = <7>; - }; - /* 7 unused */ - }; -}; - -&usb0 { /* USB0 MIO52-63 */ - status = "okay"; - xlnx,usb-polarity = <0>; - xlnx,usb-reset-mode = <0>; -}; - -&dwc3_0 { - status = "okay"; - dr_mode = "peripheral"; - maximum-speed = "high-speed"; -}; diff --git a/arch/arm/dts/zynqmp-a2197-m-revA.dts b/arch/arm/dts/zynqmp-a2197-m-revA.dts deleted file mode 100644 index e4b45eafe4..0000000000 --- a/arch/arm/dts/zynqmp-a2197-m-revA.dts +++ /dev/null @@ -1,461 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx Versal a2197 RevA System Controller - * - * (C) Copyright 2019, Xilinx, Inc. - * - * Michal Simek - */ -/dts-v1/; - -#include "zynqmp.dtsi" -#include "zynqmp-clk-ccf.dtsi" -#include - -/ { - model = "Versal System Controller on a2197 Memory Char board RevA"; - compatible = "xlnx,zynqmp-a2197-m-revA", "xlnx,zynqmp-a2197-revA", - "xlnx,zynqmp-a2197", "xlnx,zynqmp"; - - aliases { - ethernet0 = &gem0; - gpio0 = &gpio; - i2c0 = &i2c0; - i2c1 = &i2c1; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - rtc0 = &rtc; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &dcc; - usb0 = &usb0; - usb1 = &usb1; - spi0 = &qspi; - }; - - chosen { - bootargs = "earlycon"; - stdout-path = "serial0:115200n8"; - xlnx,eeprom = <&eeprom>; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */ - }; -}; - -&qspi { - status = "okay"; - is-dual = <1>; - flash@0 { - compatible = "m25p80", "spi-flash"; /* 32MB */ - #address-cells = <1>; - #size-cells = <1>; - reg = <0x0>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; - spi-max-frequency = <108000000>; - }; -}; - -&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ - status = "okay"; - non-removable; - disable-wp; - bus-width = <8>; - xlnx,mio_bank = <0>; /* FIXME tap delay */ -}; - -&uart0 { /* uart0 MIO38-39 */ - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&uart1 { /* uart1 MIO40-41 */ - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&sdhci1 { /* sd1 MIO45-51 cd in place */ - status = "disable"; - no-1-8-v; - disable-wp; - xlnx,mio_bank = <1>; -}; - -&gem0 { - status = "okay"; - phy-handle = <&phy0>; - phy-mode = "sgmii"; /* DTG generates this properly 1512 */ - phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; - phy0: phy@0 { /* marwell m88e1512 - SGMII */ - reg = <0>; -/* xlnx,phy-type = ; */ - }; -/* phy-names = "..."; - phys = <&lane0 PHY_TYPE_SGMII ... > - Note: lane0 sgmii/lane1 usb3 */ -}; - -&gpio { - status = "okay"; - gpio-line-names = "SCLK_OUT", "MISO_MO1", "MO2", "MO3", "MOSI_MIO0", /* 0 - 4 */ - "N_SS_OUT", "", "SYS_CTRL0", "SYS_CTRL1", "SYS_CTRL2", /* 5 - 9 */ - "SYS_CTRL3", "SYS_CTRL4", "SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ - "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ - "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ - "", "RXD0_IN", "TXD0_OUT", "TXD1_OUT", "RXD1_IN", /* 25 - 29 */ - "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ - "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ - "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ - "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ - "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ - "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ - "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ - "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ - "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ - "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ - "", "", "", "", "", /* 78 - 79 */ - "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ - "", "", "", "", "", /* 90 - 94 */ - "", "", "", "", "", /* 95 - 99 */ - "", "", "", "", "", /* 100 - 104 */ - "", "", "", "", "", /* 105 - 109 */ - "", "", "", "", "", /* 110 - 114 */ - "", "", "", "", "", /* 115 - 119 */ - "", "", "", "", "", /* 120 - 124 */ - "", "", "", "", "", /* 125 - 129 */ - "", "", "", "", "", /* 130 - 134 */ - "", "", "", "", "", /* 135 - 139 */ - "", "", "", "", "", /* 140 - 144 */ - "", "", "", "", "", /* 145 - 149 */ - "", "", "", "", "", /* 150 - 154 */ - "", "", "", "", "", /* 155 - 159 */ - "", "", "", "", "", /* 160 - 164 */ - "", "", "", "", "", /* 165 - 169 */ - "", "", "", ""; /* 170 - 174 */ -}; - -&i2c0 { /* MIO 34-35 - can't stay here */ - status = "okay"; - clock-frequency = <400000>; - i2c-mux@74 { /* u46 */ - compatible = "nxp,pca9548"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x74>; - /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ - i2c@0 { /* PMBUS must be enabled via SW21 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - reg_vcc1v2_lp4: tps544@15 { /* u97 */ - compatible = "ti,tps544b25"; - reg = <0x15>; - }; - reg_vcc1v1_lp4: tps544@16 { /* u95 */ - compatible = "ti,tps544b25"; - reg = <0x16>; - }; - reg_vdd1_1v8_lp4: tps544@17 { /* u99 */ - compatible = "ti,tps544b25"; - reg = <0x17>; - }; - /* UTIL_PMBUS connection */ - reg_vcc1v8: tps544@13 { /* u92 */ - compatible = "ti,tps544b25"; - reg = <0x13>; - }; - reg_vcc3v3: tps544@14 { /* u93 */ - compatible = "ti,tps544b25"; - reg = <0x14>; - }; - reg_vcc5v0: tps544@1e { /* u94 */ - compatible = "ti,tps544b25"; - reg = <0x1e>; - }; - }; - i2c@1 { /* PMBUS_INA226 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - vcc_aux: ina226@42 { /* u86 */ - compatible = "ti,ina226"; - reg = <0x42>; - shunt-resistor = <5000>; - }; - vcc_ram: ina226@43 { /* u81 */ - compatible = "ti,ina226"; - reg = <0x43>; - shunt-resistor = <5000>; - }; - vcc1v1_lp4: ina226@46 { /* u96 */ - compatible = "ti,ina226"; - reg = <0x46>; - shunt-resistor = <5000>; - }; - vcc1v2_lp4: ina226@47 { /* u98 */ - compatible = "ti,ina226"; - reg = <0x47>; - shunt-resistor = <5000>; - }; - vdd1_1v8_lp4: ina226@48 { /* u100 */ - compatible = "ti,ina226"; - reg = <0x48>; - shunt-resistor = <5000>; - }; - vcc0v6_lp4: ina226@49 { /* u101 */ - compatible = "ti,ina226"; - reg = <0x49>; - shunt-resistor = <5000>; - }; - }; - i2c@2 { /* PMBUS1 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - reg_vccint: tps53681@c0 { /* u69 */ - compatible = "ti,tps53681"; /* FIXME no linux driver */ - reg = <0xc0>; - }; - reg_vcc_pmc: tps544@7 { /* u80 */ - compatible = "ti,tps544b25"; - reg = <0x7>; - }; - reg_vcc_ram: tps544@8 { /* u82 */ - compatible = "ti,tps544b25"; - reg = <0x8>; - }; - reg_vcc_pslp: tps544@9 { /* u83 */ - compatible = "ti,tps544b25"; - reg = <0x9>; - }; - reg_vcc_psfp: tps544@a { /* u84 */ - compatible = "ti,tps544b25"; - reg = <0xa>; - }; - reg_vccaux: tps544@d { /* u85 */ - compatible = "ti,tps544b25"; - reg = <0xd>; - }; - reg_vccaux_pmc: tps544@e { /* u87 */ - compatible = "ti,tps544b25"; - reg = <0xe>; - }; - reg_vcco_500: tps544@f { /* u88 */ - compatible = "ti,tps544b25"; - reg = <0xf>; - }; - reg_vcco_501: tps544@10 { /* u89 */ - compatible = "ti,tps544b25"; - reg = <0x10>; - }; - reg_vcco_502: tps544@11 { /* u90 */ - compatible = "ti,tps544b25"; - reg = <0x11>; - }; - reg_vcco_503: tps544@12 { /* u91 */ - compatible = "ti,tps544b25"; - reg = <0x12>; - }; - }; - i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ - #address-cells = <1>; - #size-cells = <0>; - /* reg = <3>; */ - }; - i2c@4 { /* LP_I2C_SM */ - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - /* connected to U20G */ - }; - /* 5-7 unused */ - }; -}; - -/* TODO sysctrl via J239 */ -/* TODO samtec J212G/H via J242 */ -/* TODO teensy via U30 PCA9543A bus 1 */ -&i2c1 { /* i2c1 MIO 36-37 */ - status = "okay"; - clock-frequency = <400000>; - - /* Must be enabled via J242 */ - eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ - compatible = "atmel,24c02"; - reg = <0x51>; - }; - - i2c-mux@74 { /* u35 */ - compatible = "nxp,pca9548"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x74>; - /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */ - dc_i2c: i2c@0 { /* DC_I2C */ - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - /* Use for storing information about SC board */ - eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */ - compatible = "atmel,24c08"; - reg = <0x54>; - }; - si570_ref_clk: clock-generator@5d { /* u26 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* FIXME addr */ - temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ - clock-frequency = <33333333>; - clock-output-names = "REF_CLK"; /* FIXME */ - }; - /* Connection via Samtec U20D */ - /* Use for storing information about X-PRC card */ - x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ - compatible = "atmel,24c02"; - reg = <0x52>; - }; - - /* Use for setting up certain features on X-PRC card */ - x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ - compatible = "nxp,pca9534"; - reg = <0x22>; - gpio-controller; /* IRQ not connected */ - #gpio-cells = <2>; - gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", - "", "", "", ""; - gtr_sel0 { - gpio-hog; - gpios = <0 0>; - input; /* FIXME add meaning */ - line-name = "sw4_1"; - }; - gtr_sel1 { - gpio-hog; - gpios = <1 0>; - input; /* FIXME add meaning */ - line-name = "sw4_2"; - }; - gtr_sel2 { - gpio-hog; - gpios = <2 0>; - input; /* FIXME add meaning */ - line-name = "sw4_3"; - }; - gtr_sel3 { - gpio-hog; - gpios = <3 0>; - input; /* FIXME add meaning */ - line-name = "sw4_4"; - }; - }; - }; - i2c@1 { /* UTIL_PMBUS - FIXME incorrect schematics */ - #address-cells = <1>; - #size-cells = <0>; - /* reg = <1>; */ - }; - i2c@2 { /* C0_LP4 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - si570_c0_lp4: clock-generator@5d { /* u10 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* FIXME addr */ - temperature-stability = <50>; - factory-fout = <30000000>; - clock-frequency = <30000000>; - clock-output-names = "C0_LP4_SI570_CLK"; - }; - }; - i2c@3 { /* C1_LP4 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - si570_c1_lp4: clock-generator@5d { /* u10 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* FIXME addr */ - temperature-stability = <50>; - factory-fout = <30000000>; - clock-frequency = <30000000>; - clock-output-names = "C1_LP4_SI570_CLK"; - }; - }; - i2c@4 { /* C2_LP4 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - si570_c2_lp4: clock-generator@5d { /* u10 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* FIXME addr */ - temperature-stability = <50>; - factory-fout = <30000000>; - clock-frequency = <30000000>; - clock-output-names = "C2_LP4_SI570_CLK"; - }; - }; - i2c@5 { /* C3_LP4 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <5>; - si570_c3_lp4: clock-generator@5d { /* u15 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* FIXME addr */ - temperature-stability = <50>; - factory-fout = <30000000>; - clock-frequency = <30000000>; - clock-output-names = "C3_LP4_SI570_CLK"; - }; - }; - i2c@6 { /* HSDP_SI570 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <6>; - si570_hsdp: clock-generator@5d { /* u19 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* FIXME addr */ - temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "HSDP_SI570"; - }; - }; - }; -}; - -&usb0 { - status = "okay"; - xlnx,usb-polarity = <0>; - xlnx,usb-reset-mode = <0>; -}; - -&dwc3_0 { - status = "okay"; - dr_mode = "host"; - /* dr_mode = "peripheral"; */ - maximum-speed = "high-speed"; -}; - -&usb1 { - status = "disabled"; /* not at mem board */ - xlnx,usb-polarity = <0>; - xlnx,usb-reset-mode = <0>; -}; - -&dwc3_1 { - /delete-property/ phy-names ; - /delete-property/ phys ; - maximum-speed = "high-speed"; - snps,dis_u2_susphy_quirk ; - snps,dis_u3_susphy_quirk ; - status = "disabled"; -}; diff --git a/arch/arm/dts/zynqmp-a2197-p-revA.dts b/arch/arm/dts/zynqmp-a2197-p-revA.dts deleted file mode 100644 index 322b36e391..0000000000 --- a/arch/arm/dts/zynqmp-a2197-p-revA.dts +++ /dev/null @@ -1,567 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx Versal a2197 RevA System Controller - * - * (C) Copyright 2019, Xilinx, Inc. - * - * Michal Simek - */ -/dts-v1/; - -#include "zynqmp.dtsi" -#include "zynqmp-clk-ccf.dtsi" -#include - -/ { - model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */ - compatible = "xlnx,zynqmp-a2197-p-revA", "xlnx,zynqmp-a2197-revA", - "xlnx,zynqmp-a2197", "xlnx,zynqmp"; - - aliases { - ethernet0 = &gem0; - gpio0 = &gpio; - i2c0 = &i2c0; - i2c1 = &i2c1; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - rtc0 = &rtc; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &dcc; - usb0 = &usb0; - usb1 = &usb1; - }; - - chosen { - bootargs = "earlycon"; - stdout-path = "serial0:115200n8"; - xlnx,eeprom = <&eeprom>; - /* xlnx,fmc-eeprom = FIXME */ - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */ - }; -}; - -&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ - status = "okay"; - non-removable; - disable-wp; - bus-width = <8>; - xlnx,mio_bank = <0>; -}; - -&uart0 { /* uart0 MIO38-39 */ - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&uart1 { /* uart1 MIO40-41 */ - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&sdhci1 { /* sd1 MIO45-51 cd in place */ - status = "okay"; - no-1-8-v; - disable-wp; - xlnx,mio_bank = <1>; -}; - -&gem0 { - status = "okay"; - phy-handle = <&phy0>; - phy-mode = "sgmii"; /* DTG generates this properly 1512 */ - is-internal-pcspma; - /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ - phy0: phy@0 { - reg = <0>; - }; -}; - -&gpio { - status = "okay"; - gpio-line-names = "", "", "", "", "", /* 0 - 4 */ - "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */ - "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ - "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ - "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ - "", "", "", "", "", /* 25 - 29 */ - "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ - "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ - "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ - "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ - "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ - "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ - "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ - "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ - "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ - "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ - "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ - "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ - "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ - "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ - "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ - "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ - "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */ - "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ - "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ - "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ - "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */ - "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */ - "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ - "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ - "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ - "", "", "", "", "", /* 150 - 154 */ - "", "", "", "", "", /* 155 - 159 */ - "", "", "", "", "", /* 160 - 164 */ - "", "", "", "", "", /* 165 - 169 */ - "", "", "", ""; /* 170 - 174 */ -}; - -&i2c0 { /* MIO 34-35 - can't stay here */ - status = "okay"; - clock-frequency = <400000>; - i2c-mux@74 { /* u33 */ - compatible = "nxp,pca9548"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x74>; - /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ - i2c@0 { /* PMBUS1 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - /* On connector J98 */ - reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x7>; - regulator-name = "reg_vcc_fmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2600000>; - /* enable-gpio = <&gpio0 23 0x4>; optional */ - }; - reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x8>; - }; - reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x9>; - }; - reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0xa>; - }; - reg_vccint: tps53681@c0 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */ - compatible = "ti,tps53681"; /* FIXME no linux driver */ - reg = <0xc0>; - /* vccint, vcc_io_soc */ - }; - }; - i2c@1 { /* PMBUS1_INA226 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - /* FIXME check alerts comming to SC */ - vcc_fmc: ina226@42 { /* u81 */ - compatible = "ti,ina226"; - reg = <0x42>; - shunt-resistor = <5000>; - }; - vcc_ram: ina226@43 { /* u82 */ - compatible = "ti,ina226"; - reg = <0x43>; - shunt-resistor = <5000>; - }; - vcc_pslp: ina226@44 { /* u84 */ - compatible = "ti,ina226"; - reg = <0x44>; - shunt-resistor = <5000>; - }; - vcc_psfp: ina226@45 { /* u87 */ - compatible = "ti,ina226"; - reg = <0x45>; - shunt-resistor = <5000>; - }; - }; - i2c@2 { /* PMBUS2 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - /* On connector J104 */ - reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0xd>; - }; - reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0xe>; - }; - reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0xf>; - }; - reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x10>; - }; - reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x11>; - }; - reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x12>; - }; - reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x13>; - }; - reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x14>; - }; - reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x15>; - }; - reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x16>; - }; - reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x17>; - }; - reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x19>; - }; - reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x1a>; - }; - reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x1b>; - }; - reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x1c>; - }; - reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x1d>; - }; - reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x1e>; - }; - reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */ - compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ - reg = <0x1f>; - }; - }; - i2c@3 { /* PMBUS2_INA226 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - /* FIXME check alerts coming to SC */ - vccaux: ina226@40 { /* u89 */ - compatible = "ti,ina226"; - reg = <0x40>; - shunt-resistor = <5000>; - }; - vccaux_fmc: ina226@41 { /* u91 */ - compatible = "ti,ina226"; - reg = <0x41>; - shunt-resistor = <5000>; - }; - vcco_500: ina226@42 { /* u92 */ - compatible = "ti,ina226"; - reg = <0x42>; - shunt-resistor = <5000>; - }; - vcco_501: ina226@43 { /* u94 */ - compatible = "ti,ina226"; - reg = <0x43>; - shunt-resistor = <5000>; - }; - vcco_502: ina226@44 { /* u96 */ - compatible = "ti,ina226"; - reg = <0x44>; - shunt-resistor = <5000>; - }; - vcco_503: ina226@45 { /* u98 */ - compatible = "ti,ina226"; - reg = <0x45>; - shunt-resistor = <5000>; - }; - vcc_1v8: ina226@46 { /* u100 */ - compatible = "ti,ina226"; - reg = <0x46>; - shunt-resistor = <5000>; - }; - vcc_3v3: ina226@47 { /* u103 */ - compatible = "ti,ina226"; - reg = <0x47>; - shunt-resistor = <5000>; - }; - vcc_1v2_ddr4: ina226@48 { /* u105 */ - compatible = "ti,ina226"; - reg = <0x48>; - shunt-resistor = <1000>; - }; - vcc1v1_lp4: ina226@49 { /* u107 */ - compatible = "ti,ina226"; - reg = <0x49>; - shunt-resistor = <5000>; - }; - vadj_fmc: ina226@4a { /* u110 */ - compatible = "ti,ina226"; - reg = <0x4a>; - shunt-resistor = <5000>; - }; - mgtyavcc: ina226@4b { /* u112 */ - compatible = "ti,ina226"; - reg = <0x4b>; - shunt-resistor = <1000>; - }; - mgtyavtt: ina226@4c { /* u113 */ - compatible = "ti,ina226"; - reg = <0x4c>; - shunt-resistor = <1000>; - }; - mgtyvccaux: ina226@4d { /* u116 */ - compatible = "ti,ina226"; - reg = <0x4d>; - shunt-resistor = <5000>; - }; - vcc_bat: ina226@4e { /* u12 */ - compatible = "ti,ina226"; - reg = <0x4e>; - shunt-resistor = <10000000>; /* 10 ohm */ - }; - }; - i2c@4 { /* LP_I2C_SM */ - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - /* connected to J212G */ - /* zynqmp sm alert or samtec J212H */ - }; - /* 5-7 unused */ - }; -}; - -&i2c1 { /* i2c1 MIO 36-37 */ - status = "okay"; - clock-frequency = <400000>; - - /* Must be enabled via J242 */ - eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ - compatible = "atmel,24c02"; - reg = <0x51>; - }; - - i2c-mux@74 { /* u35 */ - compatible = "nxp,pca9548"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x74>; - /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ - dc_i2c: i2c@0 { /* DC_I2C */ - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - /* Use for storing information about SC board */ - eeprom: eeprom@54 { /* u34 - m24128 16kB */ - compatible = "st,24c128", "atmel,24c128"; - reg = <0x54>; - }; - si570_ref_clk: clock-generator@5d { /* u32 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* 570JAC000900DG */ - temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different */ - clock-frequency = <33333333>; - clock-output-names = "REF_CLK"; /* FIXME */ - }; - /* Connection via Samtec J212D */ - /* Use for storing information about X-PRC card */ - x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ - compatible = "atmel,24c02"; - reg = <0x52>; - }; - - /* Use for setting up certain features on X-PRC card */ - x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ - compatible = "nxp,pca9534"; - reg = <0x22>; - gpio-controller; /* IRQ not connected */ - #gpio-cells = <2>; - gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", - "", "", "", ""; - gtr_sel0 { - gpio-hog; - gpios = <0 0>; - input; /* FIXME add meaning */ - line-name = "sw4_1"; - }; - gtr_sel1 { - gpio-hog; - gpios = <1 0>; - input; /* FIXME add meaning */ - line-name = "sw4_2"; - }; - gtr_sel2 { - gpio-hog; - gpios = <2 0>; - input; /* FIXME add meaning */ - line-name = "sw4_3"; - }; - gtr_sel3 { - gpio-hog; - gpios = <3 0>; - input; /* FIXME add meaning */ - line-name = "sw4_4"; - }; - }; - }; - i2c@1 { /* FMCP1_IIC */ - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - /* FIXME connection to Samtec J51C */ - /* expected eeprom 0x50 SE cards */ - }; - i2c@2 { /* FMCP2_IIC */ - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - /* FIXME connection to Samtec J53C */ - /* expected eeprom 0x50 SE cards */ - }; - i2c@3 { /* DDR4_DIMM1 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - si570_ddr_dimm1: clock-generator@60 { /* u2 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x60>; /* 570BAB000299DG */ - temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "REF_CLK"; /* FIXME */ - }; - /* 0x50 SPD? */ - }; - i2c@4 { /* DDR4_DIMM2 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - si570_ddr_dimm2: clock-generator@60 { /* u3 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x60>; /* 570BAB000299DG */ - temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "REF_CLK"; /* FIXME */ - }; - /* 0x50 SPD? */ - }; - i2c@5 { /* LPDDR4_SI570_CLK */ - #address-cells = <1>; - #size-cells = <0>; - reg = <5>; - si570_lpddr4: clock-generator@60 { /* u4 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x60>; /* 570BAB000299DG */ - temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "LPDDR4_SI570_CLK"; - }; - }; - i2c@6 { /* HSDP_SI570 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <6>; - si570_hsdp: clock-generator@5d { /* u5 */ - #clock-cells = <0>; - compatible = "silabs,si570"; - reg = <0x5d>; /* 570JAC000900DG */ - temperature-stability = <50>; - factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ - clock-frequency = <33333333>; - clock-output-names = "HSDP_SI570"; - }; - }; - i2c@7 { /* PCIE_CLK */ - #address-cells = <1>; - #size-cells = <0>; - reg = <7>; - /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ - /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */ - /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ - clock_8t49n287: clock-generator@d8 { /* u39 8T49N240 - pcie clocking 3 */ - #clock-cells = <1>; /* author David Cater */ - compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */ - reg = <0xd8>; - /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */ - /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */ - - }; - - }; - }; -}; - -&usb0 { - status = "okay"; - xlnx,usb-polarity = <0>; - xlnx,usb-reset-mode = <0>; -}; - -&dwc3_0 { - status = "okay"; - dr_mode = "peripheral"; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - maximum-speed = "super-speed"; -}; - -&usb1 { - status = "okay"; - xlnx,usb-polarity = <0>; - xlnx,usb-reset-mode = <0>; -}; - -&dwc3_1 { - /delete-property/ phy-names ; - /delete-property/ phys ; - dr_mode = "host"; - maximum-speed = "high-speed"; - snps,dis_u2_susphy_quirk ; - snps,dis_u3_susphy_quirk ; - status = "okay"; -}; - -&xilinx_ams { - status = "okay"; -}; - -&ams_ps { - status = "okay"; -}; - -&ams_pl { - status = "okay"; -}; diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts new file mode 100644 index 0000000000..ae834bc2a6 --- /dev/null +++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts @@ -0,0 +1,282 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller on MGT + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 MGT Char board RevA"; + compatible = "xlnx,zynqmp-g-a2197-00-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + gpio0 = &gpio; + i2c0 = &i2c0; + mmc0 = &sdhci0; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + xlnx,eeprom = <&eeprom>; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 16GB */ + status = "okay"; + non-removable; + disable-wp; + bus-width = <8>; + xlnx,mio_bank = <0>; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; + u-boot,dm-pre-reloc; +}; + +&gem0 { /* eth MDIO 76/77 */ + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; + is-internal-pcspma; + phy0: phy@0 { /* marwell m88e1512 */ + reg = <0>; + reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; +/* xlnx,phy-type = ; */ + }; +/* phy-names = "..."; + phys = <&lane0 PHY_TYPE_SGMII ... > + Note: lane0 sgmii/lane1 usb3 */ +}; + +&gpio { + status = "okay"; + gpio-line-names = "", "", "", "", "", /* 0 - 4 */ + "", "", "", "", "", /* 5 - 9 */ + "", "", "", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "", "", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "", "", "ETH_RESET_B", "", "", /* 40 - 44 */ + "", "", "", "", "", /* 45 - 49 */ + "", "", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "", /* 60 - 64 */ + "", "", "", "", "", /* 65 - 69 */ + "", "", "", "", "", /* 70 - 74 */ + "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ + "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ + "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ + "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ + "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ + "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */ + "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ + "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ + "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ + "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */ + "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */ + "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ + "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ + "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 174 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + scl-gpios = <&gpio 34 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + i2c-mux@74 { /* u94 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@50 { /* u96 - 24LC32A - 256B */ + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + i2c@1 { /* CM_I2C_SCL - Samtec */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + i2c@2 { /* PMBUS - AFX_PMBUS */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + tps544@d { /* u85 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + tps544@10 { /* u73 */ + compatible = "ti,tps544b25"; + reg = <0x10>; + }; + tps544@11 { /* u76 */ + compatible = "ti,tps544b25"; + reg = <0x11>; + }; + tps544@12 { /* u77 */ + compatible = "ti,tps544b25"; + reg = <0x12>; + }; + tps544@13 { /* u80 */ + compatible = "ti,tps544b25"; + reg = <0x13>; + }; + tps544@14 { /* u81 */ + compatible = "ti,tps544b25"; + reg = <0x14>; + }; + tps544@15 { /* u83 */ + compatible = "ti,tps544b25"; + reg = <0x15>; + }; + tps544@16 { /* u63 */ + compatible = "ti,tps544b25"; + reg = <0x16>; + }; + tps544@17 { /* u66 */ + compatible = "ti,tps544b25"; + reg = <0x17>; + }; + tps544@18 { /* u67 */ + compatible = "ti,tps544b25"; + reg = <0x18>; + }; + tps544@19 { /* u69 */ + compatible = "ti,tps544b25"; + reg = <0x19>; + }; + tps544@1d { /* u88 */ + compatible = "ti,tps544b25"; + reg = <0x1d>; + }; + tps544@1e { /* u89 */ + compatible = "ti,tps544b25"; + reg = <0x1e>; + }; + tps544@1f { /* u87 */ + compatible = "ti,tps544b25"; + reg = <0x1f>; + }; + tps544@20 { /* u71 */ + compatible = "ti,tps544b25"; + reg = <0x20>; + }; + ina226@40 { /* u74 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <1000>; + }; + ina226@41 { /* u75 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <1000>; + }; + ina226@42 { /* u78 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + ina226@43 { /* u79 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <1000>; + }; + ina226@44 { /* u82 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <1000>; + }; + ina226@45 { /* u84 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + tps53681@c0 { /* u53 - FIXME name - don't know what it does - also vcc_io_soc */ + compatible = "ti,tps53681"; /* FIXME no linux driver */ + reg = <0xc0>; + }; + }; + i2c@3 { /* fmc1 via JA2G */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + eeprom_fmc1: eeprom@50 { /* on FMC */ + compatible = "atmel,24c04"; + reg = <0x50>; + }; + }; + i2c@4 { /* fmc2 via JA3G */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + eeprom_fmc2: eeprom@50 { /* on FMC */ + compatible = "atmel,24c04"; + reg = <0x50>; + }; + }; + i2c@5 { /* fmc3 via JA4G */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + eeprom_fmc3: eeprom@50 { /* on FMC */ + compatible = "atmel,24c04"; + reg = <0x50>; + }; + }; + i2c@6 { /* ddr dimm */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + /* 7 unused */ + }; +}; + +&usb0 { /* USB0 MIO52-63 */ + status = "okay"; + xlnx,usb-polarity = <0>; + xlnx,usb-reset-mode = <0>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "peripheral"; + maximum-speed = "high-speed"; +}; diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts new file mode 100644 index 0000000000..65eeea1b26 --- /dev/null +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 Memory Char board RevA"; + compatible = "xlnx,zynqmp-m-a2197-01-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + gpio0 = &gpio; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + usb0 = &usb0; + usb1 = &usb1; + spi0 = &qspi; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + xlnx,eeprom = <&eeprom>; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */ + }; +}; + +&qspi { + status = "okay"; + is-dual = <1>; + flash@0 { + compatible = "m25p80", "spi-flash"; /* 32MB */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ + status = "okay"; + non-removable; + disable-wp; + bus-width = <8>; + xlnx,mio_bank = <0>; /* FIXME tap delay */ +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; + u-boot,dm-pre-reloc; +}; + +&uart1 { /* uart1 MIO40-41 */ + status = "okay"; + u-boot,dm-pre-reloc; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "disable"; + no-1-8-v; + disable-wp; + xlnx,mio_bank = <1>; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; /* DTG generates this properly 1512 */ + phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; + phy0: phy@0 { /* marwell m88e1512 - SGMII */ + reg = <0>; +/* xlnx,phy-type = ; */ + }; +/* phy-names = "..."; + phys = <&lane0 PHY_TYPE_SGMII ... > + Note: lane0 sgmii/lane1 usb3 */ +}; + +&gpio { + status = "okay"; + gpio-line-names = "SCLK_OUT", "MISO_MO1", "MO2", "MO3", "MOSI_MIO0", /* 0 - 4 */ + "N_SS_OUT", "", "SYS_CTRL0", "SYS_CTRL1", "SYS_CTRL2", /* 5 - 9 */ + "SYS_CTRL3", "SYS_CTRL4", "SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "RXD0_IN", "TXD0_OUT", "TXD1_OUT", "RXD1_IN", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ + "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ + "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ + "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "", "", "", "", "", /* 78 - 79 */ + "", "", "", "", "", /* 80 - 84 */ + "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 90 - 94 */ + "", "", "", "", "", /* 95 - 99 */ + "", "", "", "", "", /* 100 - 104 */ + "", "", "", "", "", /* 105 - 109 */ + "", "", "", "", "", /* 110 - 114 */ + "", "", "", "", "", /* 115 - 119 */ + "", "", "", "", "", /* 120 - 124 */ + "", "", "", "", "", /* 125 - 129 */ + "", "", "", "", "", /* 130 - 134 */ + "", "", "", "", "", /* 135 - 139 */ + "", "", "", "", "", /* 140 - 144 */ + "", "", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 174 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + i2c-mux@74 { /* u46 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX0_RESET */ + i2c@0 { /* PMBUS must be enabled via SW21 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + reg_vcc1v2_lp4: tps544@15 { /* u97 */ + compatible = "ti,tps544b25"; + reg = <0x15>; + }; + reg_vcc1v1_lp4: tps544@16 { /* u95 */ + compatible = "ti,tps544b25"; + reg = <0x16>; + }; + reg_vdd1_1v8_lp4: tps544@17 { /* u99 */ + compatible = "ti,tps544b25"; + reg = <0x17>; + }; + /* UTIL_PMBUS connection */ + reg_vcc1v8: tps544@13 { /* u92 */ + compatible = "ti,tps544b25"; + reg = <0x13>; + }; + reg_vcc3v3: tps544@14 { /* u93 */ + compatible = "ti,tps544b25"; + reg = <0x14>; + }; + reg_vcc5v0: tps544@1e { /* u94 */ + compatible = "ti,tps544b25"; + reg = <0x1e>; + }; + }; + i2c@1 { /* PMBUS_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + vcc_aux: ina226@42 { /* u86 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u81 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc1v1_lp4: ina226@46 { /* u96 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + vcc1v2_lp4: ina226@47 { /* u98 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + vdd1_1v8_lp4: ina226@48 { /* u100 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + vcc0v6_lp4: ina226@49 { /* u101 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* PMBUS1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + reg_vccint: tps53681@c0 { /* u69 */ + compatible = "ti,tps53681"; /* FIXME no linux driver */ + reg = <0xc0>; + }; + reg_vcc_pmc: tps544@7 { /* u80 */ + compatible = "ti,tps544b25"; + reg = <0x7>; + }; + reg_vcc_ram: tps544@8 { /* u82 */ + compatible = "ti,tps544b25"; + reg = <0x8>; + }; + reg_vcc_pslp: tps544@9 { /* u83 */ + compatible = "ti,tps544b25"; + reg = <0x9>; + }; + reg_vcc_psfp: tps544@a { /* u84 */ + compatible = "ti,tps544b25"; + reg = <0xa>; + }; + reg_vccaux: tps544@d { /* u85 */ + compatible = "ti,tps544b25"; + reg = <0xd>; + }; + reg_vccaux_pmc: tps544@e { /* u87 */ + compatible = "ti,tps544b25"; + reg = <0xe>; + }; + reg_vcco_500: tps544@f { /* u88 */ + compatible = "ti,tps544b25"; + reg = <0xf>; + }; + reg_vcco_501: tps544@10 { /* u89 */ + compatible = "ti,tps544b25"; + reg = <0x10>; + }; + reg_vcco_502: tps544@11 { /* u90 */ + compatible = "ti,tps544b25"; + reg = <0x11>; + }; + reg_vcco_503: tps544@12 { /* u91 */ + compatible = "ti,tps544b25"; + reg = <0x12>; + }; + }; + i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ + #address-cells = <1>; + #size-cells = <0>; + /* reg = <3>; */ + }; + i2c@4 { /* LP_I2C_SM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* connected to U20G */ + }; + /* 5-7 unused */ + }; +}; + +/* TODO sysctrl via J239 */ +/* TODO samtec J212G/H via J242 */ +/* TODO teensy via U30 PCA9543A bus 1 */ +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + + /* Must be enabled via J242 */ + eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* FIXME reset connected to SYSCTRL_IIC_MUX1_RESET */ + dc_i2c: i2c@0 { /* DC_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u51 - m24128 16kB FIXME addr */ + compatible = "atmel,24c08"; + reg = <0x54>; + }; + si570_ref_clk: clock-generator@5d { /* u26 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <156250000>; /* FIXME every chip can be different */ + clock-frequency = <33333333>; + clock-output-names = "REF_CLK"; /* FIXME */ + }; + /* Connection via Samtec U20D */ + /* Use for storing information about X-PRC card */ + x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Use for setting up certain features on X-PRC card */ + x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr_sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr_sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr_sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr_sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + i2c@1 { /* UTIL_PMBUS - FIXME incorrect schematics */ + #address-cells = <1>; + #size-cells = <0>; + /* reg = <1>; */ + }; + i2c@2 { /* C0_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_c0_lp4: clock-generator@5d { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C0_LP4_SI570_CLK"; + }; + }; + i2c@3 { /* C1_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_c1_lp4: clock-generator@5d { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C1_LP4_SI570_CLK"; + }; + }; + i2c@4 { /* C2_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si570_c2_lp4: clock-generator@5d { /* u10 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C2_LP4_SI570_CLK"; + }; + }; + i2c@5 { /* C3_LP4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_c3_lp4: clock-generator@5d { /* u15 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <30000000>; + clock-frequency = <30000000>; + clock-output-names = "C3_LP4_SI570_CLK"; + }; + }; + i2c@6 { /* HSDP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_hsdp: clock-generator@5d { /* u19 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* FIXME addr */ + temperature-stability = <50>; + factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ + clock-frequency = <33333333>; + clock-output-names = "HSDP_SI570"; + }; + }; + }; +}; + +&usb0 { + status = "okay"; + xlnx,usb-polarity = <0>; + xlnx,usb-reset-mode = <0>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "host"; + /* dr_mode = "peripheral"; */ + maximum-speed = "high-speed"; +}; + +&usb1 { + status = "disabled"; /* not at mem board */ + xlnx,usb-polarity = <0>; + xlnx,usb-reset-mode = <0>; +}; + +&dwc3_1 { + /delete-property/ phy-names ; + /delete-property/ phys ; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk ; + snps,dis_u3_susphy_quirk ; + status = "disabled"; +}; diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts new file mode 100644 index 0000000000..f49da8162a --- /dev/null +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -0,0 +1,567 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal a2197 RevA System Controller + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Michal Simek + */ +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk-ccf.dtsi" +#include + +/ { + model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */ + compatible = "xlnx,zynqmp-p-a2197-00-revA", "xlnx,zynqmp-a2197-revA", + "xlnx,zynqmp-a2197", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem0; + gpio0 = &gpio; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &dcc; + usb0 = &usb0; + usb1 = &usb1; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + xlnx,eeprom = <&eeprom>; + /* xlnx,fmc-eeprom = FIXME */ + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; /* FIXME don't know how big memory is there */ + }; +}; + +&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ + status = "okay"; + non-removable; + disable-wp; + bus-width = <8>; + xlnx,mio_bank = <0>; +}; + +&uart0 { /* uart0 MIO38-39 */ + status = "okay"; + u-boot,dm-pre-reloc; +}; + +&uart1 { /* uart1 MIO40-41 */ + status = "okay"; + u-boot,dm-pre-reloc; +}; + +&sdhci1 { /* sd1 MIO45-51 cd in place */ + status = "okay"; + no-1-8-v; + disable-wp; + xlnx,mio_bank = <1>; +}; + +&gem0 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "sgmii"; /* DTG generates this properly 1512 */ + is-internal-pcspma; + /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ + phy0: phy@0 { + reg = <0>; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = "", "", "", "", "", /* 0 - 4 */ + "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */ + "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ + "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ + "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ + "", "", "", "", "", /* 25 - 29 */ + "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ + "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ + "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ + "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ + "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ + "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ + "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ + "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ + "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ + "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ + "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ + "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ + "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ + "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ + "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ + "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */ + "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ + "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ + "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ + "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */ + "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */ + "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ + "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ + "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ + "", "", "", "", "", /* 150 - 154 */ + "", "", "", "", "", /* 155 - 159 */ + "", "", "", "", "", /* 160 - 164 */ + "", "", "", "", "", /* 165 - 169 */ + "", "", "", ""; /* 170 - 174 */ +}; + +&i2c0 { /* MIO 34-35 - can't stay here */ + status = "okay"; + clock-frequency = <400000>; + i2c-mux@74 { /* u33 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ + i2c@0 { /* PMBUS1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* On connector J98 */ + reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x7>; + regulator-name = "reg_vcc_fmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2600000>; + /* enable-gpio = <&gpio0 23 0x4>; optional */ + }; + reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x8>; + }; + reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x9>; + }; + reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0xa>; + }; + reg_vccint: tps53681@c0 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */ + compatible = "ti,tps53681"; /* FIXME no linux driver */ + reg = <0xc0>; + /* vccint, vcc_io_soc */ + }; + }; + i2c@1 { /* PMBUS1_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME check alerts comming to SC */ + vcc_fmc: ina226@42 { /* u81 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcc_ram: ina226@43 { /* u82 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcc_pslp: ina226@44 { /* u84 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + vcc_psfp: ina226@45 { /* u87 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + }; + i2c@2 { /* PMBUS2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* On connector J104 */ + reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0xd>; + }; + reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0xe>; + }; + reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0xf>; + }; + reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x10>; + }; + reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x11>; + }; + reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x12>; + }; + reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x13>; + }; + reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x14>; + }; + reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x15>; + }; + reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x16>; + }; + reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x17>; + }; + reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x19>; + }; + reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x1a>; + }; + reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x1b>; + }; + reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x1c>; + }; + reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x1d>; + }; + reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x1e>; + }; + reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */ + compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ + reg = <0x1f>; + }; + }; + i2c@3 { /* PMBUS2_INA226 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* FIXME check alerts coming to SC */ + vccaux: ina226@40 { /* u89 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + vccaux_fmc: ina226@41 { /* u91 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + vcco_500: ina226@42 { /* u92 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + vcco_501: ina226@43 { /* u94 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + vcco_502: ina226@44 { /* u96 */ + compatible = "ti,ina226"; + reg = <0x44>; + shunt-resistor = <5000>; + }; + vcco_503: ina226@45 { /* u98 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + vcc_1v8: ina226@46 { /* u100 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <5000>; + }; + vcc_3v3: ina226@47 { /* u103 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + vcc_1v2_ddr4: ina226@48 { /* u105 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <1000>; + }; + vcc1v1_lp4: ina226@49 { /* u107 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + vadj_fmc: ina226@4a { /* u110 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + mgtyavcc: ina226@4b { /* u112 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <1000>; + }; + mgtyavtt: ina226@4c { /* u113 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <1000>; + }; + mgtyvccaux: ina226@4d { /* u116 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + vcc_bat: ina226@4e { /* u12 */ + compatible = "ti,ina226"; + reg = <0x4e>; + shunt-resistor = <10000000>; /* 10 ohm */ + }; + }; + i2c@4 { /* LP_I2C_SM */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* connected to J212G */ + /* zynqmp sm alert or samtec J212H */ + }; + /* 5-7 unused */ + }; +}; + +&i2c1 { /* i2c1 MIO 36-37 */ + status = "okay"; + clock-frequency = <400000>; + + /* Must be enabled via J242 */ + eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + i2c-mux@74 { /* u35 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ + dc_i2c: i2c@0 { /* DC_I2C */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* Use for storing information about SC board */ + eeprom: eeprom@54 { /* u34 - m24128 16kB */ + compatible = "st,24c128", "atmel,24c128"; + reg = <0x54>; + }; + si570_ref_clk: clock-generator@5d { /* u32 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* 570JAC000900DG */ + temperature-stability = <50>; + factory-fout = <156250000>; /* FIXME every chip can be different */ + clock-frequency = <33333333>; + clock-output-names = "REF_CLK"; /* FIXME */ + }; + /* Connection via Samtec J212D */ + /* Use for storing information about X-PRC card */ + x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Use for setting up certain features on X-PRC card */ + x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ + compatible = "nxp,pca9534"; + reg = <0x22>; + gpio-controller; /* IRQ not connected */ + #gpio-cells = <2>; + gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", + "", "", "", ""; + gtr_sel0 { + gpio-hog; + gpios = <0 0>; + input; /* FIXME add meaning */ + line-name = "sw4_1"; + }; + gtr_sel1 { + gpio-hog; + gpios = <1 0>; + input; /* FIXME add meaning */ + line-name = "sw4_2"; + }; + gtr_sel2 { + gpio-hog; + gpios = <2 0>; + input; /* FIXME add meaning */ + line-name = "sw4_3"; + }; + gtr_sel3 { + gpio-hog; + gpios = <3 0>; + input; /* FIXME add meaning */ + line-name = "sw4_4"; + }; + }; + }; + i2c@1 { /* FMCP1_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* FIXME connection to Samtec J51C */ + /* expected eeprom 0x50 SE cards */ + }; + i2c@2 { /* FMCP2_IIC */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* FIXME connection to Samtec J53C */ + /* expected eeprom 0x50 SE cards */ + }; + i2c@3 { /* DDR4_DIMM1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_ddr_dimm1: clock-generator@60 { /* u2 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; /* 570BAB000299DG */ + temperature-stability = <50>; + factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ + clock-frequency = <33333333>; + clock-output-names = "REF_CLK"; /* FIXME */ + }; + /* 0x50 SPD? */ + }; + i2c@4 { /* DDR4_DIMM2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si570_ddr_dimm2: clock-generator@60 { /* u3 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; /* 570BAB000299DG */ + temperature-stability = <50>; + factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ + clock-frequency = <33333333>; + clock-output-names = "REF_CLK"; /* FIXME */ + }; + /* 0x50 SPD? */ + }; + i2c@5 { /* LPDDR4_SI570_CLK */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + si570_lpddr4: clock-generator@60 { /* u4 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x60>; /* 570BAB000299DG */ + temperature-stability = <50>; + factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ + clock-frequency = <33333333>; + clock-output-names = "LPDDR4_SI570_CLK"; + }; + }; + i2c@6 { /* HSDP_SI570 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + si570_hsdp: clock-generator@5d { /* u5 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; /* 570JAC000900DG */ + temperature-stability = <50>; + factory-fout = <156250000>; /* FIXME every chip can be different - 10MHZ_TO_810MHZ */ + clock-frequency = <33333333>; + clock-output-names = "HSDP_SI570"; + }; + }; + i2c@7 { /* PCIE_CLK */ + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ + /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */ + /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ + clock_8t49n287: clock-generator@d8 { /* u39 8T49N240 - pcie clocking 3 */ + #clock-cells = <1>; /* author David Cater */ + compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */ + reg = <0xd8>; + /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */ + /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */ + + }; + + }; + }; +}; + +&usb0 { + status = "okay"; + xlnx,usb-polarity = <0>; + xlnx,usb-reset-mode = <0>; +}; + +&dwc3_0 { + status = "okay"; + dr_mode = "peripheral"; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + maximum-speed = "super-speed"; +}; + +&usb1 { + status = "okay"; + xlnx,usb-polarity = <0>; + xlnx,usb-reset-mode = <0>; +}; + +&dwc3_1 { + /delete-property/ phy-names ; + /delete-property/ phys ; + dr_mode = "host"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk ; + snps,dis_u3_susphy_quirk ; + status = "okay"; +}; + +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; diff --git a/configs/xilinx_zynqmp_a2197_g_revA_defconfig b/configs/xilinx_zynqmp_a2197_g_revA_defconfig deleted file mode 100644 index 47a98c6d4d..0000000000 --- a/configs/xilinx_zynqmp_a2197_g_revA_defconfig +++ /dev/null @@ -1,115 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_ZYNQMP=y -CONFIG_SYS_TEXT_BASE=0x8000000 -CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_SPL=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_IDENT_STRING=" Xilinx ZynqMP SC for Versal" -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_ZYNQMP_USB=y -CONFIG_DEBUG_UART=y -CONFIG_AHCI=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -CONFIG_SPL_LOAD_FIT=y -# CONFIG_DISPLAY_CPUINFO is not set -CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_SPL_OS_BOOT=y -CONFIG_SPL_RAM_SUPPORT=y -CONFIG_SPL_RAM_DEVICE=y -CONFIG_SPL_ATF=y -CONFIG_CMD_THOR_DOWNLOAD=y -CONFIG_CMD_MEMTEST=y -CONFIG_SYS_ALT_MEMTEST=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_FPGA_LOADBP=y -CONFIG_CMD_FPGA_LOADP=y -CONFIG_CMD_FPGA_LOAD_SECURE=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SDRAM=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_TIME=y -CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-a2197-g-revA" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SCSI_AHCI=y -CONFIG_SATA_CEVA=y -CONFIG_CLK_ZYNQMP=y -CONFIG_DFU_RAM=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FPGA_XILINX=y -CONFIG_FPGA_ZYNQMPPL=y -CONFIG_DM_GPIO=y -CONFIG_XILINX_GPIO=y -CONFIG_DM_PCA953X=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_CADENCE=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_LED=y -CONFIG_LED_GPIO=y -CONFIG_MISC=y -CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR=0x0 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ZYNQ=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y -CONFIG_SPI_FLASH_ISSI=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHY_MARVELL=y -CONFIG_PHY_NATSEMI=y -CONFIG_PHY_REALTEK=y -CONFIG_PHY_TI=y -CONFIG_PHY_VITESSE=y -CONFIG_PHY_FIXED=y -CONFIG_PHY_GIGE=y -CONFIG_MII=y -CONFIG_ZYNQ_GEM=y -CONFIG_SCSI=y -CONFIG_DM_SCSI=y -CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_ANNOUNCE=y -CONFIG_ZYNQ_SERIAL=y -CONFIG_SPI=y -CONFIG_ZYNQMP_GQSPI=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_XHCI_ZYNQMP=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_GENERIC=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_ULPI=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Xilinx" -CONFIG_USB_GADGET_VENDOR_NUM=0x03FD -CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 -CONFIG_USB_FUNCTION_THOR=y -CONFIG_SPL_GZIP=y -CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_a2197_m_revA_defconfig b/configs/xilinx_zynqmp_a2197_m_revA_defconfig deleted file mode 100644 index fb4020b2df..0000000000 --- a/configs/xilinx_zynqmp_a2197_m_revA_defconfig +++ /dev/null @@ -1,115 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_ZYNQMP=y -CONFIG_SYS_TEXT_BASE=0x8000000 -CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_SPL=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_IDENT_STRING=" Xilinx ZynqMP SC for Versal" -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_ZYNQMP_USB=y -CONFIG_DEBUG_UART=y -CONFIG_AHCI=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -CONFIG_SPL_LOAD_FIT=y -# CONFIG_DISPLAY_CPUINFO is not set -CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_SPL_OS_BOOT=y -CONFIG_SPL_RAM_SUPPORT=y -CONFIG_SPL_RAM_DEVICE=y -CONFIG_SPL_ATF=y -CONFIG_CMD_THOR_DOWNLOAD=y -CONFIG_CMD_MEMTEST=y -CONFIG_SYS_ALT_MEMTEST=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_FPGA_LOADBP=y -CONFIG_CMD_FPGA_LOADP=y -CONFIG_CMD_FPGA_LOAD_SECURE=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SDRAM=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_TIME=y -CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-a2197-m-revA" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SCSI_AHCI=y -CONFIG_SATA_CEVA=y -CONFIG_CLK_ZYNQMP=y -CONFIG_DFU_RAM=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FPGA_XILINX=y -CONFIG_FPGA_ZYNQMPPL=y -CONFIG_DM_GPIO=y -CONFIG_XILINX_GPIO=y -CONFIG_DM_PCA953X=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_CADENCE=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_LED=y -CONFIG_LED_GPIO=y -CONFIG_MISC=y -CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR=0x0 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ZYNQ=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y -CONFIG_SPI_FLASH_ISSI=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHY_MARVELL=y -CONFIG_PHY_NATSEMI=y -CONFIG_PHY_REALTEK=y -CONFIG_PHY_TI=y -CONFIG_PHY_VITESSE=y -CONFIG_PHY_FIXED=y -CONFIG_PHY_GIGE=y -CONFIG_MII=y -CONFIG_ZYNQ_GEM=y -CONFIG_SCSI=y -CONFIG_DM_SCSI=y -CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_ANNOUNCE=y -CONFIG_ZYNQ_SERIAL=y -CONFIG_SPI=y -CONFIG_ZYNQMP_GQSPI=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_XHCI_ZYNQMP=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_GENERIC=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_ULPI=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Xilinx" -CONFIG_USB_GADGET_VENDOR_NUM=0x03FD -CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 -CONFIG_USB_FUNCTION_THOR=y -CONFIG_SPL_GZIP=y -CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_a2197_p_revA_defconfig b/configs/xilinx_zynqmp_a2197_p_revA_defconfig deleted file mode 100644 index d19c6b34ca..0000000000 --- a/configs/xilinx_zynqmp_a2197_p_revA_defconfig +++ /dev/null @@ -1,116 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_ZYNQMP=y -CONFIG_SYS_TEXT_BASE=0x8000000 -CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_SPL=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_IDENT_STRING=" Xilinx ZynqMP SC for Versal" -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_ZYNQMP_USB=y -CONFIG_SPL_ZYNQMP_TWO_SDHCI=y -CONFIG_DEBUG_UART=y -CONFIG_AHCI=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -CONFIG_SPL_LOAD_FIT=y -# CONFIG_DISPLAY_CPUINFO is not set -CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_SPL_OS_BOOT=y -CONFIG_SPL_RAM_SUPPORT=y -CONFIG_SPL_RAM_DEVICE=y -CONFIG_SPL_ATF=y -CONFIG_CMD_THOR_DOWNLOAD=y -CONFIG_CMD_MEMTEST=y -CONFIG_SYS_ALT_MEMTEST=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_FPGA_LOADBP=y -CONFIG_CMD_FPGA_LOADP=y -CONFIG_CMD_FPGA_LOAD_SECURE=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SDRAM=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_TIME=y -CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-a2197-p-revA" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SCSI_AHCI=y -CONFIG_SATA_CEVA=y -CONFIG_CLK_ZYNQMP=y -CONFIG_DFU_RAM=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FPGA_XILINX=y -CONFIG_FPGA_ZYNQMPPL=y -CONFIG_DM_GPIO=y -CONFIG_XILINX_GPIO=y -CONFIG_DM_PCA953X=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_CADENCE=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_LED=y -CONFIG_LED_GPIO=y -CONFIG_MISC=y -CONFIG_I2C_EEPROM=y -CONFIG_SYS_I2C_EEPROM_ADDR=0x0 -CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ZYNQ=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y -CONFIG_SF_DUAL_FLASH=y -CONFIG_SPI_FLASH_ISSI=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHY_MARVELL=y -CONFIG_PHY_NATSEMI=y -CONFIG_PHY_REALTEK=y -CONFIG_PHY_TI=y -CONFIG_PHY_VITESSE=y -CONFIG_PHY_FIXED=y -CONFIG_PHY_GIGE=y -CONFIG_MII=y -CONFIG_ZYNQ_GEM=y -CONFIG_SCSI=y -CONFIG_DM_SCSI=y -CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_ANNOUNCE=y -CONFIG_ZYNQ_SERIAL=y -CONFIG_SPI=y -CONFIG_ZYNQMP_GQSPI=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_XHCI_ZYNQMP=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_GENERIC=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_ULPI=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Xilinx" -CONFIG_USB_GADGET_VENDOR_NUM=0x03FD -CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 -CONFIG_USB_FUNCTION_THOR=y -CONFIG_SPL_GZIP=y -CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_a2197_revA_defconfig b/configs/xilinx_zynqmp_a2197_revA_defconfig index 3498483f4b..5acf701073 100644 --- a/configs/xilinx_zynqmp_a2197_revA_defconfig +++ b/configs/xilinx_zynqmp_a2197_revA_defconfig @@ -43,7 +43,7 @@ CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-a2197-revA" -CONFIG_OF_LIST="zynqmp-a2197-revA zynqmp-a2197-g-revA zynqmp-a2197-p-revA zynqmp-a2197-m-revA" +CONFIG_OF_LIST="zynqmp-a2197-revA zynqmp-g-a2197-00-revA zynqmp-p-a2197-00-revA zynqmp-m-a2197-01-revA" CONFIG_ENV_IS_IN_FAT=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y diff --git a/configs/xilinx_zynqmp_g_a2197_00_revA_defconfig b/configs/xilinx_zynqmp_g_a2197_00_revA_defconfig new file mode 100644 index 0000000000..9cc9191a41 --- /dev/null +++ b/configs/xilinx_zynqmp_g_a2197_00_revA_defconfig @@ -0,0 +1,115 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP SC for Versal" +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_ZYNQMP_USB=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_ATF=y +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_FPGA_LOAD_SECURE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SDRAM=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-g-a2197-00-revA" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_DM_GPIO=y +CONFIG_XILINX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x0 +CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SF_DUAL_FLASH=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_MII=y +CONFIG_ZYNQ_GEM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_SPI=y +CONFIG_ZYNQMP_GQSPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_ZYNQMP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_FUNCTION_THOR=y +CONFIG_SPL_GZIP=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_m_a2197_01_revA_defconfig b/configs/xilinx_zynqmp_m_a2197_01_revA_defconfig new file mode 100644 index 0000000000..ea6c6b9b01 --- /dev/null +++ b/configs/xilinx_zynqmp_m_a2197_01_revA_defconfig @@ -0,0 +1,115 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP SC for Versal" +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_ZYNQMP_USB=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_ATF=y +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_FPGA_LOAD_SECURE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SDRAM=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-m-a2197-01-revA" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_DM_GPIO=y +CONFIG_XILINX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x0 +CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SF_DUAL_FLASH=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_MII=y +CONFIG_ZYNQ_GEM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_SPI=y +CONFIG_ZYNQMP_GQSPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_ZYNQMP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_FUNCTION_THOR=y +CONFIG_SPL_GZIP=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_p_a2197_00_revA_defconfig b/configs/xilinx_zynqmp_p_a2197_00_revA_defconfig new file mode 100644 index 0000000000..a7c4c79eba --- /dev/null +++ b/configs/xilinx_zynqmp_p_a2197_00_revA_defconfig @@ -0,0 +1,116 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP SC for Versal" +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_ZYNQMP_USB=y +CONFIG_SPL_ZYNQMP_TWO_SDHCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_ATF=y +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_FPGA_LOAD_SECURE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SDRAM=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-p-a2197-00-revA" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_DM_GPIO=y +CONFIG_XILINX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x0 +CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SF_DUAL_FLASH=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_MII=y +CONFIG_ZYNQ_GEM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_SPI=y +CONFIG_ZYNQMP_GQSPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_ZYNQMP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_FUNCTION_THOR=y +CONFIG_SPL_GZIP=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y