From: Yangbo Lu Date: Wed, 1 Nov 2017 08:41:08 +0000 (+0800) Subject: layerscape: clean up kernel patches X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=4e209e07f780211e1b5f1a4b16980481f167227f;p=librecmc%2Flibrecmc.git layerscape: clean up kernel patches A previous patch disaggregated kernel patch 601 intending to reverse the ndo_get_stats64 change, but it also dropped many other changes without a reason. This caused build issue for layerscape. This patch is to fix that with below steps. 1. Reversed patch "1c4415a layerscape: reverse changes to ndo_get_stats64", but kept kernel patch 701 which was a proper fix. 2. Reversed the ndo_get_stats64 change in kernel patch 601. 3. Renamed patch 601 (net patch) to 202 (core-linux patch). Maybe it's more proper. Fixes: 1c4415a679f9 ("layerscape: reverse changes to ndo_get_stats64") Signed-off-by: Yangbo Lu --- diff --git a/target/linux/layerscape/patches-4.9/001-net-centralize-net_device-min-max-MTU-checking.patch b/target/linux/layerscape/patches-4.9/001-net-centralize-net_device-min-max-MTU-checking.patch deleted file mode 100644 index fcabb62f5e..0000000000 --- a/target/linux/layerscape/patches-4.9/001-net-centralize-net_device-min-max-MTU-checking.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 95b8bbff6ecf0692747622af16d917a67313f8cc Mon Sep 17 00:00:00 2001 -From: Jarod Wilson -Date: Fri, 7 Oct 2016 22:04:33 -0400 -Subject: [PATCH] net: centralize net_device min/max MTU checking - -While looking into an MTU issue with sfc, I started noticing that almost -every NIC driver with an ndo_change_mtu function implemented almost -exactly the same range checks, and in many cases, that was the only -practical thing their ndo_change_mtu function was doing. Quite a few -drivers have either 68, 64, 60 or 46 as their minimum MTU value checked, -and then various sizes from 1500 to 65535 for their maximum MTU value. We -can remove a whole lot of redundant code here if we simple store min_mtu -and max_mtu in net_device, and check against those in net/core/dev.c's -dev_set_mtu(). - -In theory, there should be zero functional change with this patch, it just -puts the infrastructure in place. Subsequent patches will attempt to start -using said infrastructure, with theoretically zero change in -functionality. - -CC: netdev@vger.kernel.org -Signed-off-by: Jarod Wilson -Signed-off-by: David S. Miller ---- - include/linux/netdevice.h | 4 ++++ - net/core/dev.c | 13 +++++++++++-- - 2 files changed, 15 insertions(+), 2 deletions(-) - -diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h -index 780e7171f548..2082b7d02a77 100644 ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -1507,6 +1507,8 @@ enum netdev_priv_flags { - * @if_port: Selectable AUI, TP, ... - * @dma: DMA channel - * @mtu: Interface MTU value -+ * @min_mtu: Interface Minimum MTU value -+ * @max_mtu: Interface Maximum MTU value - * @type: Interface hardware type - * @hard_header_len: Maximum hardware header length. - * @min_header_len: Minimum hardware header length -@@ -1728,6 +1730,8 @@ struct net_device { - unsigned char dma; - - unsigned int mtu; -+ unsigned int min_mtu; -+ unsigned int max_mtu; - unsigned short type; - unsigned short hard_header_len; - unsigned short min_header_len; -diff --git a/net/core/dev.c b/net/core/dev.c -index 2e04fd188081..c7ec56e8659a 100644 ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -6524,9 +6524,18 @@ int dev_set_mtu(struct net_device *dev, int new_mtu) - if (new_mtu == dev->mtu) - return 0; - -- /* MTU must be positive. */ -- if (new_mtu < 0) -+ /* MTU must be positive, and in range */ -+ if (new_mtu < 0 || new_mtu < dev->min_mtu) { -+ net_err_ratelimited("%s: Invalid MTU %d requested, hw min %d\n", -+ dev->name, new_mtu, dev->min_mtu); - return -EINVAL; -+ } -+ -+ if (dev->max_mtu > 0 && new_mtu > dev->max_mtu) { -+ net_err_ratelimited("%s: Invalid MTU %d requested, hw max %d\n", -+ dev->name, new_mtu, dev->min_mtu); -+ return -EINVAL; -+ } - - if (!netif_device_present(dev)) - return -ENODEV; --- -2.11.1 - diff --git a/target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch b/target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch new file mode 100644 index 0000000000..6eeb6ffe77 --- /dev/null +++ b/target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch @@ -0,0 +1,538 @@ +From c37953457a7ebeb0d97ae8574b3d41274fcd9119 Mon Sep 17 00:00:00 2001 +From: Yangbo Lu +Date: Wed, 1 Nov 2017 16:22:33 +0800 +Subject: [PATCH] core-linux: support layerscape + +This is a integrated patch for layerscape core-linux support. + +Signed-off-by: Madalin Bucur +Signed-off-by: Zhao Qiang +Signed-off-by: Camelia Groza +Signed-off-by: Madalin Bucur +Signed-off-by: Zhang Ying-22455 +Signed-off-by: Ramneek Mehresh +Signed-off-by: Jarod Wilson +Signed-off-by: Nikhil Badola +Signed-off-by: stephen hemminger +Signed-off-by: Arnd Bergmann +Signed-off-by: Yangbo Lu +--- + drivers/base/devres.c | 66 ++++++++++++++++++++++++++++ + drivers/base/soc.c | 66 ++++++++++++++++++++++++++++ + include/linux/device.h | 19 ++++++++ + include/linux/fsl/svr.h | 97 +++++++++++++++++++++++++++++++++++++++++ + include/linux/fsl_devices.h | 3 ++ + include/linux/netdev_features.h | 2 + + include/linux/netdevice.h | 4 ++ + include/linux/skbuff.h | 2 + + include/linux/sys_soc.h | 3 ++ + include/uapi/linux/if_ether.h | 1 + + net/core/dev.c | 13 +++++- + net/core/skbuff.c | 29 +++++++++++- + net/sched/sch_generic.c | 7 +++ + 13 files changed, 309 insertions(+), 3 deletions(-) + create mode 100644 include/linux/fsl/svr.h + +diff --git a/drivers/base/devres.c b/drivers/base/devres.c +index 8fc654f0..71d57702 100644 +--- a/drivers/base/devres.c ++++ b/drivers/base/devres.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + + #include "base.h" + +@@ -985,3 +986,68 @@ void devm_free_pages(struct device *dev, unsigned long addr) + &devres)); + } + EXPORT_SYMBOL_GPL(devm_free_pages); ++ ++static void devm_percpu_release(struct device *dev, void *pdata) ++{ ++ void __percpu *p; ++ ++ p = *(void __percpu **)pdata; ++ free_percpu(p); ++} ++ ++static int devm_percpu_match(struct device *dev, void *data, void *p) ++{ ++ struct devres *devr = container_of(data, struct devres, data); ++ ++ return *(void **)devr->data == p; ++} ++ ++/** ++ * __devm_alloc_percpu - Resource-managed alloc_percpu ++ * @dev: Device to allocate per-cpu memory for ++ * @size: Size of per-cpu memory to allocate ++ * @align: Alignment of per-cpu memory to allocate ++ * ++ * Managed alloc_percpu. Per-cpu memory allocated with this function is ++ * automatically freed on driver detach. ++ * ++ * RETURNS: ++ * Pointer to allocated memory on success, NULL on failure. ++ */ ++void __percpu *__devm_alloc_percpu(struct device *dev, size_t size, ++ size_t align) ++{ ++ void *p; ++ void __percpu *pcpu; ++ ++ pcpu = __alloc_percpu(size, align); ++ if (!pcpu) ++ return NULL; ++ ++ p = devres_alloc(devm_percpu_release, sizeof(void *), GFP_KERNEL); ++ if (!p) { ++ free_percpu(pcpu); ++ return NULL; ++ } ++ ++ *(void __percpu **)p = pcpu; ++ ++ devres_add(dev, p); ++ ++ return pcpu; ++} ++EXPORT_SYMBOL_GPL(__devm_alloc_percpu); ++ ++/** ++ * devm_free_percpu - Resource-managed free_percpu ++ * @dev: Device this memory belongs to ++ * @pdata: Per-cpu memory to free ++ * ++ * Free memory allocated with devm_alloc_percpu(). ++ */ ++void devm_free_percpu(struct device *dev, void __percpu *pdata) ++{ ++ WARN_ON(devres_destroy(dev, devm_percpu_release, devm_percpu_match, ++ (void *)pdata)); ++} ++EXPORT_SYMBOL_GPL(devm_free_percpu); +diff --git a/drivers/base/soc.c b/drivers/base/soc.c +index b63f23e6..0c5cf872 100644 +--- a/drivers/base/soc.c ++++ b/drivers/base/soc.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + + static DEFINE_IDA(soc_ida); + +@@ -159,3 +160,68 @@ static int __init soc_bus_register(void) + return bus_register(&soc_bus_type); + } + core_initcall(soc_bus_register); ++ ++static int soc_device_match_one(struct device *dev, void *arg) ++{ ++ struct soc_device *soc_dev = container_of(dev, struct soc_device, dev); ++ const struct soc_device_attribute *match = arg; ++ ++ if (match->machine && ++ !glob_match(match->machine, soc_dev->attr->machine)) ++ return 0; ++ ++ if (match->family && ++ !glob_match(match->family, soc_dev->attr->family)) ++ return 0; ++ ++ if (match->revision && ++ !glob_match(match->revision, soc_dev->attr->revision)) ++ return 0; ++ ++ if (match->soc_id && ++ !glob_match(match->soc_id, soc_dev->attr->soc_id)) ++ return 0; ++ ++ return 1; ++} ++ ++/* ++ * soc_device_match - identify the SoC in the machine ++ * @matches: zero-terminated array of possible matches ++ * ++ * returns the first matching entry of the argument array, or NULL ++ * if none of them match. ++ * ++ * This function is meant as a helper in place of of_match_node() ++ * in cases where either no device tree is available or the information ++ * in a device node is insufficient to identify a particular variant ++ * by its compatible strings or other properties. For new devices, ++ * the DT binding should always provide unique compatible strings ++ * that allow the use of of_match_node() instead. ++ * ++ * The calling function can use the .data entry of the ++ * soc_device_attribute to pass a structure or function pointer for ++ * each entry. ++ */ ++const struct soc_device_attribute *soc_device_match( ++ const struct soc_device_attribute *matches) ++{ ++ int ret = 0; ++ ++ if (!matches) ++ return NULL; ++ ++ while (!ret) { ++ if (!(matches->machine || matches->family || ++ matches->revision || matches->soc_id)) ++ break; ++ ret = bus_for_each_dev(&soc_bus_type, NULL, (void *)matches, ++ soc_device_match_one); ++ if (!ret) ++ matches++; ++ else ++ return matches; ++ } ++ return NULL; ++} ++EXPORT_SYMBOL_GPL(soc_device_match); +diff --git a/include/linux/device.h b/include/linux/device.h +index 8d732965..6d206930 100644 +--- a/include/linux/device.h ++++ b/include/linux/device.h +@@ -688,6 +688,25 @@ void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res); + int devm_add_action(struct device *dev, void (*action)(void *), void *data); + void devm_remove_action(struct device *dev, void (*action)(void *), void *data); + ++/** ++ * devm_alloc_percpu - Resource-managed alloc_percpu ++ * @dev: Device to allocate per-cpu memory for ++ * @type: Type to allocate per-cpu memory for ++ * ++ * Managed alloc_percpu. Per-cpu memory allocated with this function is ++ * automatically freed on driver detach. ++ * ++ * RETURNS: ++ * Pointer to allocated memory on success, NULL on failure. ++ */ ++#define devm_alloc_percpu(dev, type) \ ++ ((typeof(type) __percpu *)__devm_alloc_percpu((dev), sizeof(type), \ ++ __alignof__(type))) ++ ++void __percpu *__devm_alloc_percpu(struct device *dev, size_t size, ++ size_t align); ++void devm_free_percpu(struct device *dev, void __percpu *pdata); ++ + static inline int devm_add_action_or_reset(struct device *dev, + void (*action)(void *), void *data) + { +diff --git a/include/linux/fsl/svr.h b/include/linux/fsl/svr.h +new file mode 100644 +index 00000000..e95c8f43 +--- /dev/null ++++ b/include/linux/fsl/svr.h +@@ -0,0 +1,97 @@ ++/* ++ * MPC85xx cpu type detection ++ * ++ * Copyright 2011-2012 Freescale Semiconductor, Inc. ++ * ++ * This is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#ifndef FSL_SVR_H ++#define FSL_SVR_H ++ ++#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */ ++#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/ ++#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/ ++ ++/* Some parts define SVR[0:23] as the SOC version */ ++#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */ ++ ++#define SVR_8533 0x803400 ++#define SVR_8535 0x803701 ++#define SVR_8536 0x803700 ++#define SVR_8540 0x803000 ++#define SVR_8541 0x807200 ++#define SVR_8543 0x803200 ++#define SVR_8544 0x803401 ++#define SVR_8545 0x803102 ++#define SVR_8547 0x803101 ++#define SVR_8548 0x803100 ++#define SVR_8555 0x807100 ++#define SVR_8560 0x807000 ++#define SVR_8567 0x807501 ++#define SVR_8568 0x807500 ++#define SVR_8569 0x808000 ++#define SVR_8572 0x80E000 ++#define SVR_P1010 0x80F100 ++#define SVR_P1011 0x80E500 ++#define SVR_P1012 0x80E501 ++#define SVR_P1013 0x80E700 ++#define SVR_P1014 0x80F101 ++#define SVR_P1017 0x80F700 ++#define SVR_P1020 0x80E400 ++#define SVR_P1021 0x80E401 ++#define SVR_P1022 0x80E600 ++#define SVR_P1023 0x80F600 ++#define SVR_P1024 0x80E402 ++#define SVR_P1025 0x80E403 ++#define SVR_P2010 0x80E300 ++#define SVR_P2020 0x80E200 ++#define SVR_P2040 0x821000 ++#define SVR_P2041 0x821001 ++#define SVR_P3041 0x821103 ++#define SVR_P4040 0x820100 ++#define SVR_P4080 0x820000 ++#define SVR_P5010 0x822100 ++#define SVR_P5020 0x822000 ++#define SVR_P5021 0X820500 ++#define SVR_P5040 0x820400 ++#define SVR_T4240 0x824000 ++#define SVR_T4120 0x824001 ++#define SVR_T4160 0x824100 ++#define SVR_T4080 0x824102 ++#define SVR_C291 0x850000 ++#define SVR_C292 0x850020 ++#define SVR_C293 0x850030 ++#define SVR_B4860 0X868000 ++#define SVR_G4860 0x868001 ++#define SVR_G4060 0x868003 ++#define SVR_B4440 0x868100 ++#define SVR_G4440 0x868101 ++#define SVR_B4420 0x868102 ++#define SVR_B4220 0x868103 ++#define SVR_T1040 0x852000 ++#define SVR_T1041 0x852001 ++#define SVR_T1042 0x852002 ++#define SVR_T1020 0x852100 ++#define SVR_T1021 0x852101 ++#define SVR_T1022 0x852102 ++#define SVR_T1023 0x854100 ++#define SVR_T1024 0x854000 ++#define SVR_T2080 0x853000 ++#define SVR_T2081 0x853100 ++ ++#define SVR_8610 0x80A000 ++#define SVR_8641 0x809000 ++#define SVR_8641D 0x809001 ++ ++#define SVR_9130 0x860001 ++#define SVR_9131 0x860000 ++#define SVR_9132 0x861000 ++#define SVR_9232 0x861400 ++ ++#define SVR_Unknown 0xFFFFFF ++ ++#endif +diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h +index f2912914..22308465 100644 +--- a/include/linux/fsl_devices.h ++++ b/include/linux/fsl_devices.h +@@ -99,7 +99,10 @@ struct fsl_usb2_platform_data { + unsigned suspended:1; + unsigned already_suspended:1; + unsigned has_fsl_erratum_a007792:1; ++ unsigned has_fsl_erratum_14:1; + unsigned has_fsl_erratum_a005275:1; ++ unsigned has_fsl_erratum_a006918:1; ++ unsigned has_fsl_erratum_a005697:1; + unsigned check_phy_clk_valid:1; + + /* register save area for suspend/resume */ +diff --git a/include/linux/netdev_features.h b/include/linux/netdev_features.h +index 9c6c8ef2..90b4107e 100644 +--- a/include/linux/netdev_features.h ++++ b/include/linux/netdev_features.h +@@ -74,6 +74,7 @@ enum { + NETIF_F_BUSY_POLL_BIT, /* Busy poll */ + + NETIF_F_HW_TC_BIT, /* Offload TC infrastructure */ ++ NETIF_F_HW_ACCEL_MQ_BIT, /* Hardware-accelerated multiqueue */ + + /* + * Add your fresh new feature above and remember to update +@@ -136,6 +137,7 @@ enum { + #define NETIF_F_HW_L2FW_DOFFLOAD __NETIF_F(HW_L2FW_DOFFLOAD) + #define NETIF_F_BUSY_POLL __NETIF_F(BUSY_POLL) + #define NETIF_F_HW_TC __NETIF_F(HW_TC) ++#define NETIF_F_HW_ACCEL_MQ __NETIF_F(HW_ACCEL_MQ) + + #define for_each_netdev_feature(mask_addr, bit) \ + for_each_set_bit(bit, (unsigned long *)mask_addr, NETDEV_FEATURE_COUNT) +diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h +index c3a1537c..9740875b 100644 +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -1509,6 +1509,8 @@ enum netdev_priv_flags { + * @if_port: Selectable AUI, TP, ... + * @dma: DMA channel + * @mtu: Interface MTU value ++ * @min_mtu: Interface Minimum MTU value ++ * @max_mtu: Interface Maximum MTU value + * @type: Interface hardware type + * @hard_header_len: Maximum hardware header length. + * @min_header_len: Minimum hardware header length +@@ -1735,6 +1737,8 @@ struct net_device { + unsigned char dma; + + unsigned int mtu; ++ unsigned int min_mtu; ++ unsigned int max_mtu; + unsigned short type; + unsigned short hard_header_len; + unsigned short min_header_len; +diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h +index 9a0c945e..06f33c98 100644 +--- a/include/linux/skbuff.h ++++ b/include/linux/skbuff.h +@@ -903,6 +903,7 @@ void kfree_skb(struct sk_buff *skb); + void kfree_skb_list(struct sk_buff *segs); + void skb_tx_error(struct sk_buff *skb); + void consume_skb(struct sk_buff *skb); ++void skb_recycle(struct sk_buff *skb); + void __kfree_skb(struct sk_buff *skb); + extern struct kmem_cache *skbuff_head_cache; + +@@ -3057,6 +3058,7 @@ static inline void skb_free_datagram_locked(struct sock *sk, + } + int skb_kill_datagram(struct sock *sk, struct sk_buff *skb, unsigned int flags); + int skb_copy_bits(const struct sk_buff *skb, int offset, void *to, int len); ++void copy_skb_header(struct sk_buff *new, const struct sk_buff *old); + int skb_store_bits(struct sk_buff *skb, int offset, const void *from, int len); + __wsum skb_copy_and_csum_bits(const struct sk_buff *skb, int offset, u8 *to, + int len, __wsum csum); +diff --git a/include/linux/sys_soc.h b/include/linux/sys_soc.h +index 2739ccb6..9f5eb06f 100644 +--- a/include/linux/sys_soc.h ++++ b/include/linux/sys_soc.h +@@ -13,6 +13,7 @@ struct soc_device_attribute { + const char *family; + const char *revision; + const char *soc_id; ++ const void *data; + }; + + /** +@@ -34,4 +35,6 @@ void soc_device_unregister(struct soc_device *soc_dev); + */ + struct device *soc_device_to_device(struct soc_device *soc); + ++const struct soc_device_attribute *soc_device_match( ++ const struct soc_device_attribute *matches); + #endif /* __SOC_BUS_H */ +diff --git a/include/uapi/linux/if_ether.h b/include/uapi/linux/if_ether.h +index 51f38442..5c01afbf 100644 +--- a/include/uapi/linux/if_ether.h ++++ b/include/uapi/linux/if_ether.h +@@ -35,6 +35,7 @@ + #define ETH_DATA_LEN 1500 /* Max. octets in payload */ + #define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */ + #define ETH_FCS_LEN 4 /* Octets in the FCS */ ++#define ETH_MIN_MTU 68 /* Min IPv4 MTU per RFC791 */ + + /* + * These are the defined Ethernet Protocol ID's. +diff --git a/net/core/dev.c b/net/core/dev.c +index 512086f2..6e3bb7bc 100644 +--- a/net/core/dev.c ++++ b/net/core/dev.c +@@ -6603,9 +6603,18 @@ int dev_set_mtu(struct net_device *dev, int new_mtu) + if (new_mtu == dev->mtu) + return 0; + +- /* MTU must be positive. */ +- if (new_mtu < 0) ++ /* MTU must be positive, and in range */ ++ if (new_mtu < 0 || new_mtu < dev->min_mtu) { ++ net_err_ratelimited("%s: Invalid MTU %d requested, hw min %d\n", ++ dev->name, new_mtu, dev->min_mtu); + return -EINVAL; ++ } ++ ++ if (dev->max_mtu > 0 && new_mtu > dev->max_mtu) { ++ net_err_ratelimited("%s: Invalid MTU %d requested, hw max %d\n", ++ dev->name, new_mtu, dev->min_mtu); ++ return -EINVAL; ++ } + + if (!netif_device_present(dev)) + return -ENODEV; +diff --git a/net/core/skbuff.c b/net/core/skbuff.c +index 7e7b7ce0..0f9c014a 100644 +--- a/net/core/skbuff.c ++++ b/net/core/skbuff.c +@@ -842,6 +842,32 @@ void napi_consume_skb(struct sk_buff *skb, int budget) + } + EXPORT_SYMBOL(napi_consume_skb); + ++/** ++ * skb_recycle - clean up an skb for reuse ++ * @skb: buffer ++ * ++ * Recycles the skb to be reused as a receive buffer. This ++ * function does any necessary reference count dropping, and ++ * cleans up the skbuff as if it just came from __alloc_skb(). ++ */ ++void skb_recycle(struct sk_buff *skb) ++{ ++ struct skb_shared_info *shinfo; ++ u8 head_frag = skb->head_frag; ++ ++ skb_release_head_state(skb); ++ ++ shinfo = skb_shinfo(skb); ++ memset(shinfo, 0, offsetof(struct skb_shared_info, dataref)); ++ atomic_set(&shinfo->dataref, 1); ++ ++ memset(skb, 0, offsetof(struct sk_buff, tail)); ++ skb->data = skb->head + NET_SKB_PAD; ++ skb->head_frag = head_frag; ++ skb_reset_tail_pointer(skb); ++} ++EXPORT_SYMBOL(skb_recycle); ++ + /* Make sure a field is enclosed inside headers_start/headers_end section */ + #define CHECK_SKB_FIELD(field) \ + BUILD_BUG_ON(offsetof(struct sk_buff, field) < \ +@@ -1073,7 +1099,7 @@ static void skb_headers_offset_update(struct sk_buff *skb, int off) + skb->inner_mac_header += off; + } + +-static void copy_skb_header(struct sk_buff *new, const struct sk_buff *old) ++void copy_skb_header(struct sk_buff *new, const struct sk_buff *old) + { + __copy_skb_header(new, old); + +@@ -1081,6 +1107,7 @@ static void copy_skb_header(struct sk_buff *new, const struct sk_buff *old) + skb_shinfo(new)->gso_segs = skb_shinfo(old)->gso_segs; + skb_shinfo(new)->gso_type = skb_shinfo(old)->gso_type; + } ++EXPORT_SYMBOL(copy_skb_header); + + static inline int skb_alloc_rx_flag(const struct sk_buff *skb) + { +diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c +index 8018dd3a..ea760b83 100644 +--- a/net/sched/sch_generic.c ++++ b/net/sched/sch_generic.c +@@ -309,6 +309,13 @@ static void dev_watchdog(unsigned long arg) + txq->trans_timeout++; + break; + } ++ ++ /* Devices with HW_ACCEL_MQ have multiple txqs ++ * but update only the first one's transmission ++ * timestamp so avoid checking the rest. ++ */ ++ if (dev->features & NETIF_F_HW_ACCEL_MQ) ++ break; + } + + if (some_queue_timedout) { +-- +2.14.1 + diff --git a/target/linux/layerscape/patches-4.9/303-add-devm_alloc_percpu-support.patch b/target/linux/layerscape/patches-4.9/303-add-devm_alloc_percpu-support.patch deleted file mode 100644 index a8573cce00..0000000000 --- a/target/linux/layerscape/patches-4.9/303-add-devm_alloc_percpu-support.patch +++ /dev/null @@ -1,125 +0,0 @@ -From d33bde3c487c722541ad359e1d22090a78df0c77 Mon Sep 17 00:00:00 2001 -From: Zhao Qiang -Date: Tue, 11 Jul 2017 16:47:18 +0800 -Subject: [PATCH] add devm_alloc_percpu support - -Signed-off-by: Zhao Qiang ---- - drivers/base/devres.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/device.h | 19 +++++++++++++++ - 2 files changed, 85 insertions(+) - -diff --git a/drivers/base/devres.c b/drivers/base/devres.c -index 8fc654f0807b..71d577025285 100644 ---- a/drivers/base/devres.c -+++ b/drivers/base/devres.c -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - - #include "base.h" - -@@ -985,3 +986,68 @@ void devm_free_pages(struct device *dev, unsigned long addr) - &devres)); - } - EXPORT_SYMBOL_GPL(devm_free_pages); -+ -+static void devm_percpu_release(struct device *dev, void *pdata) -+{ -+ void __percpu *p; -+ -+ p = *(void __percpu **)pdata; -+ free_percpu(p); -+} -+ -+static int devm_percpu_match(struct device *dev, void *data, void *p) -+{ -+ struct devres *devr = container_of(data, struct devres, data); -+ -+ return *(void **)devr->data == p; -+} -+ -+/** -+ * __devm_alloc_percpu - Resource-managed alloc_percpu -+ * @dev: Device to allocate per-cpu memory for -+ * @size: Size of per-cpu memory to allocate -+ * @align: Alignment of per-cpu memory to allocate -+ * -+ * Managed alloc_percpu. Per-cpu memory allocated with this function is -+ * automatically freed on driver detach. -+ * -+ * RETURNS: -+ * Pointer to allocated memory on success, NULL on failure. -+ */ -+void __percpu *__devm_alloc_percpu(struct device *dev, size_t size, -+ size_t align) -+{ -+ void *p; -+ void __percpu *pcpu; -+ -+ pcpu = __alloc_percpu(size, align); -+ if (!pcpu) -+ return NULL; -+ -+ p = devres_alloc(devm_percpu_release, sizeof(void *), GFP_KERNEL); -+ if (!p) { -+ free_percpu(pcpu); -+ return NULL; -+ } -+ -+ *(void __percpu **)p = pcpu; -+ -+ devres_add(dev, p); -+ -+ return pcpu; -+} -+EXPORT_SYMBOL_GPL(__devm_alloc_percpu); -+ -+/** -+ * devm_free_percpu - Resource-managed free_percpu -+ * @dev: Device this memory belongs to -+ * @pdata: Per-cpu memory to free -+ * -+ * Free memory allocated with devm_alloc_percpu(). -+ */ -+void devm_free_percpu(struct device *dev, void __percpu *pdata) -+{ -+ WARN_ON(devres_destroy(dev, devm_percpu_release, devm_percpu_match, -+ (void *)pdata)); -+} -+EXPORT_SYMBOL_GPL(devm_free_percpu); -diff --git a/include/linux/device.h b/include/linux/device.h -index bc41e87a969b..0a2135cbddc9 100644 ---- a/include/linux/device.h -+++ b/include/linux/device.h -@@ -686,6 +686,25 @@ void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res); - int devm_add_action(struct device *dev, void (*action)(void *), void *data); - void devm_remove_action(struct device *dev, void (*action)(void *), void *data); - -+/** -+ * devm_alloc_percpu - Resource-managed alloc_percpu -+ * @dev: Device to allocate per-cpu memory for -+ * @type: Type to allocate per-cpu memory for -+ * -+ * Managed alloc_percpu. Per-cpu memory allocated with this function is -+ * automatically freed on driver detach. -+ * -+ * RETURNS: -+ * Pointer to allocated memory on success, NULL on failure. -+ */ -+#define devm_alloc_percpu(dev, type) \ -+ ((typeof(type) __percpu *)__devm_alloc_percpu((dev), sizeof(type), \ -+ __alignof__(type))) -+ -+void __percpu *__devm_alloc_percpu(struct device *dev, size_t size, -+ size_t align); -+void devm_free_percpu(struct device *dev, void __percpu *pdata); -+ - static inline int devm_add_action_or_reset(struct device *dev, - void (*action)(void *), void *data) - { --- -2.11.1 - diff --git a/target/linux/layerscape/patches-4.9/601-net-readd-skb_recycle.patch b/target/linux/layerscape/patches-4.9/601-net-readd-skb_recycle.patch deleted file mode 100644 index 08aa2a0944..0000000000 --- a/target/linux/layerscape/patches-4.9/601-net-readd-skb_recycle.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 9527ee5eb436ad773acc7320b372a5f4825a920d Mon Sep 17 00:00:00 2001 -From: Madalin Bucur -Date: Tue, 5 Jan 2016 12:12:07 +0200 -Subject: [PATCH] net: readd skb_recycle() - -Adding back skb_recycle() as it's used by the DPAA Ethernet driver. -This was removed from the upstream kernel because it was lacking users. - -Signed-off-by: Madalin Bucur ---- - include/linux/skbuff.h | 1 + - net/core/skbuff.c | 26 ++++++++++++++++++++++++++ - 2 files changed, 27 insertions(+) - -diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h -index 32810f279f8e..a52a6fb0ac2e 100644 ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -902,6 +902,7 @@ void kfree_skb(struct sk_buff *skb); - void kfree_skb_list(struct sk_buff *segs); - void skb_tx_error(struct sk_buff *skb); - void consume_skb(struct sk_buff *skb); -+void skb_recycle(struct sk_buff *skb); - void __kfree_skb(struct sk_buff *skb); - extern struct kmem_cache *skbuff_head_cache; - -diff --git a/net/core/skbuff.c b/net/core/skbuff.c -index fe008f1bd930..ab1038083df2 100644 ---- a/net/core/skbuff.c -+++ b/net/core/skbuff.c -@@ -825,6 +825,32 @@ void napi_consume_skb(struct sk_buff *skb, int budget) - } - EXPORT_SYMBOL(napi_consume_skb); - -+/** -+ * skb_recycle - clean up an skb for reuse -+ * @skb: buffer -+ * -+ * Recycles the skb to be reused as a receive buffer. This -+ * function does any necessary reference count dropping, and -+ * cleans up the skbuff as if it just came from __alloc_skb(). -+ */ -+void skb_recycle(struct sk_buff *skb) -+{ -+ struct skb_shared_info *shinfo; -+ u8 head_frag = skb->head_frag; -+ -+ skb_release_head_state(skb); -+ -+ shinfo = skb_shinfo(skb); -+ memset(shinfo, 0, offsetof(struct skb_shared_info, dataref)); -+ atomic_set(&shinfo->dataref, 1); -+ -+ memset(skb, 0, offsetof(struct sk_buff, tail)); -+ skb->data = skb->head + NET_SKB_PAD; -+ skb->head_frag = head_frag; -+ skb_reset_tail_pointer(skb); -+} -+EXPORT_SYMBOL(skb_recycle); -+ - /* Make sure a field is enclosed inside headers_start/headers_end section */ - #define CHECK_SKB_FIELD(field) \ - BUILD_BUG_ON(offsetof(struct sk_buff, field) < \ --- -2.11.1 - diff --git a/target/linux/layerscape/patches-4.9/602-linux-core-export-copy_skb_header-function.patch b/target/linux/layerscape/patches-4.9/602-linux-core-export-copy_skb_header-function.patch deleted file mode 100644 index 1244675a70..0000000000 --- a/target/linux/layerscape/patches-4.9/602-linux-core-export-copy_skb_header-function.patch +++ /dev/null @@ -1,47 +0,0 @@ -From eae03a91605fd7dccb1de11053efee87db398df3 Mon Sep 17 00:00:00 2001 -From: Zhang Ying-22455 -Date: Fri, 1 Sep 2017 14:56:01 +0800 -Subject: [PATCH] linux/core: export copy_skb_header() function - -Signed-off-by: Camelia Groza camelia.groza@nxp.com ---- - include/linux/skbuff.h | 1 + - net/core/skbuff.c | 3 ++- - 2 files changed, 3 insertions(+), 1 deletion(-) - -diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h -index a52a6fb0ac2e..a0385f9bdd4e 100644 ---- a/include/linux/skbuff.h -+++ b/include/linux/skbuff.h -@@ -3063,6 +3063,7 @@ static inline void skb_free_datagram_locked(struct sock *sk, - } - int skb_kill_datagram(struct sock *sk, struct sk_buff *skb, unsigned int flags); - int skb_copy_bits(const struct sk_buff *skb, int offset, void *to, int len); -+void copy_skb_header(struct sk_buff *new, const struct sk_buff *old); - int skb_store_bits(struct sk_buff *skb, int offset, const void *from, int len); - __wsum skb_copy_and_csum_bits(const struct sk_buff *skb, int offset, u8 *to, - int len, __wsum csum); -diff --git a/net/core/skbuff.c b/net/core/skbuff.c -index ab1038083df2..2684c49b9805 100644 ---- a/net/core/skbuff.c -+++ b/net/core/skbuff.c -@@ -1082,7 +1082,7 @@ static void skb_headers_offset_update(struct sk_buff *skb, int off) - skb->inner_mac_header += off; - } - --static void copy_skb_header(struct sk_buff *new, const struct sk_buff *old) -+void copy_skb_header(struct sk_buff *new, const struct sk_buff *old) - { - __copy_skb_header(new, old); - -@@ -1090,6 +1090,7 @@ static void copy_skb_header(struct sk_buff *new, const struct sk_buff *old) - skb_shinfo(new)->gso_segs = skb_shinfo(old)->gso_segs; - skb_shinfo(new)->gso_type = skb_shinfo(old)->gso_type; - } -+EXPORT_SYMBOL(copy_skb_header); - - static inline int skb_alloc_rx_flag(const struct sk_buff *skb) - { --- -2.11.1 - diff --git a/target/linux/layerscape/patches-4.9/603-sdk_dpaa-update-the-xmit-timestamp-to-avoid-watchdog.patch b/target/linux/layerscape/patches-4.9/603-sdk_dpaa-update-the-xmit-timestamp-to-avoid-watchdog.patch deleted file mode 100644 index a9a45962c5..0000000000 --- a/target/linux/layerscape/patches-4.9/603-sdk_dpaa-update-the-xmit-timestamp-to-avoid-watchdog.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 3d33284eb087deb7f62639a2d2c03b9d0a3eeb34 Mon Sep 17 00:00:00 2001 -From: Camelia Groza -Date: Mon, 11 Sep 2017 17:20:41 +0800 -Subject: [PATCH] sdk_dpaa: update the xmit timestamp to avoid watchdog - timeouts - -[core-linux part] - -Update txq0's trans_start in order to prevent the netdev watchdog from -triggering too quickly. Since we set the LLTX flag, the stack won't update -the jiffies for other tx queues. Prevent the watchdog from checking the -other tx queues by adding the NETIF_HW_ACCEL_MQ flag. - -Signed-off-by: Camelia Groza ---- - include/linux/netdev_features.h | 2 ++ - net/sched/sch_generic.c | 7 +++++++ - 2 files changed, 9 insertions(+) - -diff --git a/include/linux/netdev_features.h b/include/linux/netdev_features.h -index 9c6c8ef2e9e7..90b4107ebeff 100644 ---- a/include/linux/netdev_features.h -+++ b/include/linux/netdev_features.h -@@ -74,6 +74,7 @@ enum { - NETIF_F_BUSY_POLL_BIT, /* Busy poll */ - - NETIF_F_HW_TC_BIT, /* Offload TC infrastructure */ -+ NETIF_F_HW_ACCEL_MQ_BIT, /* Hardware-accelerated multiqueue */ - - /* - * Add your fresh new feature above and remember to update -@@ -136,6 +137,7 @@ enum { - #define NETIF_F_HW_L2FW_DOFFLOAD __NETIF_F(HW_L2FW_DOFFLOAD) - #define NETIF_F_BUSY_POLL __NETIF_F(BUSY_POLL) - #define NETIF_F_HW_TC __NETIF_F(HW_TC) -+#define NETIF_F_HW_ACCEL_MQ __NETIF_F(HW_ACCEL_MQ) - - #define for_each_netdev_feature(mask_addr, bit) \ - for_each_set_bit(bit, (unsigned long *)mask_addr, NETDEV_FEATURE_COUNT) -diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c -index 6cfb6e9038c2..3fab16cb7c58 100644 ---- a/net/sched/sch_generic.c -+++ b/net/sched/sch_generic.c -@@ -309,6 +309,13 @@ static void dev_watchdog(unsigned long arg) - txq->trans_timeout++; - break; - } -+ -+ /* Devices with HW_ACCEL_MQ have multiple txqs -+ * but update only the first one's transmission -+ * timestamp so avoid checking the rest. -+ */ -+ if (dev->features & NETIF_F_HW_ACCEL_MQ) -+ break; - } - - if (some_queue_timedout) { --- -2.11.1 - diff --git a/target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch b/target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch new file mode 100644 index 0000000000..ffda8a6cf8 --- /dev/null +++ b/target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch @@ -0,0 +1,452 @@ +From d51e307e4ecf51832c9e3bc30acb5dbd559d5f4d Mon Sep 17 00:00:00 2001 +From: Yangbo Lu +Date: Mon, 25 Sep 2017 12:19:34 +0800 +Subject: [PATCH] guts: support layerscape + +This is a integrated patch for layerscape guts support. + +Signed-off-by: Roy Pledge +Signed-off-by: Geert Uytterhoeven +Signed-off-by: Amrita Kumari +Signed-off-by: Yangbo Lu +--- + drivers/base/soc.c | 12 ++- + drivers/soc/fsl/guts.c | 238 +++++++++++++++++++++++++++++++++++++++++++++++ + include/linux/fsl/guts.h | 125 +++++++++++++++---------- + 3 files changed, 323 insertions(+), 52 deletions(-) + create mode 100644 drivers/soc/fsl/guts.c + +--- a/drivers/base/soc.c ++++ b/drivers/base/soc.c +@@ -167,19 +167,23 @@ static int soc_device_match_one(struct d + const struct soc_device_attribute *match = arg; + + if (match->machine && +- !glob_match(match->machine, soc_dev->attr->machine)) ++ (!soc_dev->attr->machine || ++ !glob_match(match->machine, soc_dev->attr->machine))) + return 0; + + if (match->family && +- !glob_match(match->family, soc_dev->attr->family)) ++ (!soc_dev->attr->family || ++ !glob_match(match->family, soc_dev->attr->family))) + return 0; + + if (match->revision && +- !glob_match(match->revision, soc_dev->attr->revision)) ++ (!soc_dev->attr->revision || ++ !glob_match(match->revision, soc_dev->attr->revision))) + return 0; + + if (match->soc_id && +- !glob_match(match->soc_id, soc_dev->attr->soc_id)) ++ (!soc_dev->attr->soc_id || ++ !glob_match(match->soc_id, soc_dev->attr->soc_id))) + return 0; + + return 1; +--- /dev/null ++++ b/drivers/soc/fsl/guts.c +@@ -0,0 +1,238 @@ ++/* ++ * Freescale QorIQ Platforms GUTS Driver ++ * ++ * Copyright (C) 2016 Freescale Semiconductor, Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct guts { ++ struct ccsr_guts __iomem *regs; ++ bool little_endian; ++}; ++ ++struct fsl_soc_die_attr { ++ char *die; ++ u32 svr; ++ u32 mask; ++}; ++ ++static struct guts *guts; ++static struct soc_device_attribute soc_dev_attr; ++static struct soc_device *soc_dev; ++ ++ ++/* SoC die attribute definition for QorIQ platform */ ++static const struct fsl_soc_die_attr fsl_soc_die[] = { ++ /* ++ * Power Architecture-based SoCs T Series ++ */ ++ ++ /* Die: T4240, SoC: T4240/T4160/T4080 */ ++ { .die = "T4240", ++ .svr = 0x82400000, ++ .mask = 0xfff00000, ++ }, ++ /* Die: T1040, SoC: T1040/T1020/T1042/T1022 */ ++ { .die = "T1040", ++ .svr = 0x85200000, ++ .mask = 0xfff00000, ++ }, ++ /* Die: T2080, SoC: T2080/T2081 */ ++ { .die = "T2080", ++ .svr = 0x85300000, ++ .mask = 0xfff00000, ++ }, ++ /* Die: T1024, SoC: T1024/T1014/T1023/T1013 */ ++ { .die = "T1024", ++ .svr = 0x85400000, ++ .mask = 0xfff00000, ++ }, ++ ++ /* ++ * ARM-based SoCs LS Series ++ */ ++ ++ /* Die: LS1043A, SoC: LS1043A/LS1023A */ ++ { .die = "LS1043A", ++ .svr = 0x87920000, ++ .mask = 0xffff0000, ++ }, ++ /* Die: LS2080A, SoC: LS2080A/LS2040A/LS2085A */ ++ { .die = "LS2080A", ++ .svr = 0x87010000, ++ .mask = 0xff3f0000, ++ }, ++ /* Die: LS1088A, SoC: LS1088A/LS1048A/LS1084A/LS1044A */ ++ { .die = "LS1088A", ++ .svr = 0x87030000, ++ .mask = 0xff3f0000, ++ }, ++ /* Die: LS1012A, SoC: LS1012A */ ++ { .die = "LS1012A", ++ .svr = 0x87040000, ++ .mask = 0xffff0000, ++ }, ++ /* Die: LS1046A, SoC: LS1046A/LS1026A */ ++ { .die = "LS1046A", ++ .svr = 0x87070000, ++ .mask = 0xffff0000, ++ }, ++ /* Die: LS2088A, SoC: LS2088A/LS2048A/LS2084A/LS2044A */ ++ { .die = "LS2088A", ++ .svr = 0x87090000, ++ .mask = 0xff3f0000, ++ }, ++ /* Die: LS1021A, SoC: LS1021A/LS1020A/LS1022A */ ++ { .die = "LS1021A", ++ .svr = 0x87000000, ++ .mask = 0xfff70000, ++ }, ++ { }, ++}; ++ ++static const struct fsl_soc_die_attr *fsl_soc_die_match( ++ u32 svr, const struct fsl_soc_die_attr *matches) ++{ ++ while (matches->svr) { ++ if (matches->svr == (svr & matches->mask)) ++ return matches; ++ matches++; ++ }; ++ return NULL; ++} ++ ++u32 fsl_guts_get_svr(void) ++{ ++ u32 svr = 0; ++ ++ if (!guts || !guts->regs) ++ return svr; ++ ++ if (guts->little_endian) ++ svr = ioread32(&guts->regs->svr); ++ else ++ svr = ioread32be(&guts->regs->svr); ++ ++ return svr; ++} ++EXPORT_SYMBOL(fsl_guts_get_svr); ++ ++static int fsl_guts_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct device *dev = &pdev->dev; ++ struct resource *res; ++ const struct fsl_soc_die_attr *soc_die; ++ const char *machine; ++ u32 svr; ++ ++ /* Initialize guts */ ++ guts = devm_kzalloc(dev, sizeof(*guts), GFP_KERNEL); ++ if (!guts) ++ return -ENOMEM; ++ ++ guts->little_endian = of_property_read_bool(np, "little-endian"); ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ guts->regs = devm_ioremap_resource(dev, res); ++ if (IS_ERR(guts->regs)) ++ return PTR_ERR(guts->regs); ++ ++ /* Register soc device */ ++ machine = of_flat_dt_get_machine_name(); ++ if (machine) ++ soc_dev_attr.machine = devm_kstrdup(dev, machine, GFP_KERNEL); ++ ++ svr = fsl_guts_get_svr(); ++ soc_die = fsl_soc_die_match(svr, fsl_soc_die); ++ if (soc_die) { ++ soc_dev_attr.family = devm_kasprintf(dev, GFP_KERNEL, ++ "QorIQ %s", soc_die->die); ++ } else { ++ soc_dev_attr.family = devm_kasprintf(dev, GFP_KERNEL, "QorIQ"); ++ } ++ soc_dev_attr.soc_id = devm_kasprintf(dev, GFP_KERNEL, ++ "svr:0x%08x", svr); ++ soc_dev_attr.revision = devm_kasprintf(dev, GFP_KERNEL, "%d.%d", ++ (svr >> 4) & 0xf, svr & 0xf); ++ ++ soc_dev = soc_device_register(&soc_dev_attr); ++ if (IS_ERR(soc_dev)) ++ return PTR_ERR(soc_dev); ++ ++ pr_info("Machine: %s\n", soc_dev_attr.machine); ++ pr_info("SoC family: %s\n", soc_dev_attr.family); ++ pr_info("SoC ID: %s, Revision: %s\n", ++ soc_dev_attr.soc_id, soc_dev_attr.revision); ++ return 0; ++} ++ ++static int fsl_guts_remove(struct platform_device *dev) ++{ ++ soc_device_unregister(soc_dev); ++ return 0; ++} ++ ++/* ++ * Table for matching compatible strings, for device tree ++ * guts node, for Freescale QorIQ SOCs. ++ */ ++static const struct of_device_id fsl_guts_of_match[] = { ++ { .compatible = "fsl,qoriq-device-config-1.0", }, ++ { .compatible = "fsl,qoriq-device-config-2.0", }, ++ { .compatible = "fsl,p1010-guts", }, ++ { .compatible = "fsl,p1020-guts", }, ++ { .compatible = "fsl,p1021-guts", }, ++ { .compatible = "fsl,p1022-guts", }, ++ { .compatible = "fsl,p1023-guts", }, ++ { .compatible = "fsl,p2020-guts", }, ++ { .compatible = "fsl,bsc9131-guts", }, ++ { .compatible = "fsl,bsc9132-guts", }, ++ { .compatible = "fsl,mpc8536-guts", }, ++ { .compatible = "fsl,mpc8544-guts", }, ++ { .compatible = "fsl,mpc8548-guts", }, ++ { .compatible = "fsl,mpc8568-guts", }, ++ { .compatible = "fsl,mpc8569-guts", }, ++ { .compatible = "fsl,mpc8572-guts", }, ++ { .compatible = "fsl,ls1021a-dcfg", }, ++ { .compatible = "fsl,ls1043a-dcfg", }, ++ { .compatible = "fsl,ls1046a-dcfg", }, ++ { .compatible = "fsl,ls2080a-dcfg", }, ++ { .compatible = "fsl,ls1088a-dcfg", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, fsl_guts_of_match); ++ ++static struct platform_driver fsl_guts_driver = { ++ .driver = { ++ .name = "fsl-guts", ++ .of_match_table = fsl_guts_of_match, ++ }, ++ .probe = fsl_guts_probe, ++ .remove = fsl_guts_remove, ++}; ++ ++static int __init fsl_guts_init(void) ++{ ++ return platform_driver_register(&fsl_guts_driver); ++} ++core_initcall(fsl_guts_init); ++ ++static void __exit fsl_guts_exit(void) ++{ ++ platform_driver_unregister(&fsl_guts_driver); ++} ++module_exit(fsl_guts_exit); +--- a/include/linux/fsl/guts.h ++++ b/include/linux/fsl/guts.h +@@ -29,83 +29,112 @@ + * #ifdefs. + */ + struct ccsr_guts { +- __be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ +- __be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */ +- __be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */ +- __be32 pordevsr; /* 0x.000c - POR I/O Device Status Register */ +- __be32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */ +- __be32 pordevsr2; /* 0x.0014 - POR device status register 2 */ ++ u32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ ++ u32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */ ++ u32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and ++ * Control Register ++ */ ++ u32 pordevsr; /* 0x.000c - POR I/O Device Status Register */ ++ u32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */ ++ u32 pordevsr2; /* 0x.0014 - POR device status register 2 */ + u8 res018[0x20 - 0x18]; +- __be32 porcir; /* 0x.0020 - POR Configuration Information Register */ ++ u32 porcir; /* 0x.0020 - POR Configuration Information ++ * Register ++ */ + u8 res024[0x30 - 0x24]; +- __be32 gpiocr; /* 0x.0030 - GPIO Control Register */ ++ u32 gpiocr; /* 0x.0030 - GPIO Control Register */ + u8 res034[0x40 - 0x34]; +- __be32 gpoutdr; /* 0x.0040 - General-Purpose Output Data Register */ ++ u32 gpoutdr; /* 0x.0040 - General-Purpose Output Data ++ * Register ++ */ + u8 res044[0x50 - 0x44]; +- __be32 gpindr; /* 0x.0050 - General-Purpose Input Data Register */ ++ u32 gpindr; /* 0x.0050 - General-Purpose Input Data ++ * Register ++ */ + u8 res054[0x60 - 0x54]; +- __be32 pmuxcr; /* 0x.0060 - Alternate Function Signal Multiplex Control */ +- __be32 pmuxcr2; /* 0x.0064 - Alternate function signal multiplex control 2 */ +- __be32 dmuxcr; /* 0x.0068 - DMA Mux Control Register */ ++ u32 pmuxcr; /* 0x.0060 - Alternate Function Signal ++ * Multiplex Control ++ */ ++ u32 pmuxcr2; /* 0x.0064 - Alternate function signal ++ * multiplex control 2 ++ */ ++ u32 dmuxcr; /* 0x.0068 - DMA Mux Control Register */ + u8 res06c[0x70 - 0x6c]; +- __be32 devdisr; /* 0x.0070 - Device Disable Control */ ++ u32 devdisr; /* 0x.0070 - Device Disable Control */ + #define CCSR_GUTS_DEVDISR_TB1 0x00001000 + #define CCSR_GUTS_DEVDISR_TB0 0x00004000 +- __be32 devdisr2; /* 0x.0074 - Device Disable Control 2 */ ++ u32 devdisr2; /* 0x.0074 - Device Disable Control 2 */ + u8 res078[0x7c - 0x78]; +- __be32 pmjcr; /* 0x.007c - 4 Power Management Jog Control Register */ +- __be32 powmgtcsr; /* 0x.0080 - Power Management Status and Control Register */ +- __be32 pmrccr; /* 0x.0084 - Power Management Reset Counter Configuration Register */ +- __be32 pmpdccr; /* 0x.0088 - Power Management Power Down Counter Configuration Register */ +- __be32 pmcdr; /* 0x.008c - 4Power management clock disable register */ +- __be32 mcpsumr; /* 0x.0090 - Machine Check Summary Register */ +- __be32 rstrscr; /* 0x.0094 - Reset Request Status and Control Register */ +- __be32 ectrstcr; /* 0x.0098 - Exception reset control register */ +- __be32 autorstsr; /* 0x.009c - Automatic reset status register */ +- __be32 pvr; /* 0x.00a0 - Processor Version Register */ +- __be32 svr; /* 0x.00a4 - System Version Register */ ++ u32 pmjcr; /* 0x.007c - 4 Power Management Jog Control ++ * Register ++ */ ++ u32 powmgtcsr; /* 0x.0080 - Power Management Status and ++ * Control Register ++ */ ++ u32 pmrccr; /* 0x.0084 - Power Management Reset Counter ++ * Configuration Register ++ */ ++ u32 pmpdccr; /* 0x.0088 - Power Management Power Down Counter ++ * Configuration Register ++ */ ++ u32 pmcdr; /* 0x.008c - 4Power management clock disable ++ * register ++ */ ++ u32 mcpsumr; /* 0x.0090 - Machine Check Summary Register */ ++ u32 rstrscr; /* 0x.0094 - Reset Request Status and ++ * Control Register ++ */ ++ u32 ectrstcr; /* 0x.0098 - Exception reset control register */ ++ u32 autorstsr; /* 0x.009c - Automatic reset status register */ ++ u32 pvr; /* 0x.00a0 - Processor Version Register */ ++ u32 svr; /* 0x.00a4 - System Version Register */ + u8 res0a8[0xb0 - 0xa8]; +- __be32 rstcr; /* 0x.00b0 - Reset Control Register */ ++ u32 rstcr; /* 0x.00b0 - Reset Control Register */ + u8 res0b4[0xc0 - 0xb4]; +- __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register ++ u32 iovselsr; /* 0x.00c0 - I/O voltage select status register + Called 'elbcvselcr' on 86xx SOCs */ + u8 res0c4[0x100 - 0xc4]; +- __be32 rcwsr[16]; /* 0x.0100 - Reset Control Word Status registers ++ u32 rcwsr[16]; /* 0x.0100 - Reset Control Word Status registers + There are 16 registers */ + u8 res140[0x224 - 0x140]; +- __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ +- __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ ++ u32 iodelay1; /* 0x.0224 - IO delay control register 1 */ ++ u32 iodelay2; /* 0x.0228 - IO delay control register 2 */ + u8 res22c[0x604 - 0x22c]; +- __be32 pamubypenr; /* 0x.604 - PAMU bypass enable register */ ++ u32 pamubypenr; /* 0x.604 - PAMU bypass enable register */ + u8 res608[0x800 - 0x608]; +- __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */ ++ u32 clkdvdr; /* 0x.0800 - Clock Divide Register */ + u8 res804[0x900 - 0x804]; +- __be32 ircr; /* 0x.0900 - Infrared Control Register */ ++ u32 ircr; /* 0x.0900 - Infrared Control Register */ + u8 res904[0x908 - 0x904]; +- __be32 dmacr; /* 0x.0908 - DMA Control Register */ ++ u32 dmacr; /* 0x.0908 - DMA Control Register */ + u8 res90c[0x914 - 0x90c]; +- __be32 elbccr; /* 0x.0914 - eLBC Control Register */ ++ u32 elbccr; /* 0x.0914 - eLBC Control Register */ + u8 res918[0xb20 - 0x918]; +- __be32 ddr1clkdr; /* 0x.0b20 - DDR1 Clock Disable Register */ +- __be32 ddr2clkdr; /* 0x.0b24 - DDR2 Clock Disable Register */ +- __be32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */ ++ u32 ddr1clkdr; /* 0x.0b20 - DDR1 Clock Disable Register */ ++ u32 ddr2clkdr; /* 0x.0b24 - DDR2 Clock Disable Register */ ++ u32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */ + u8 resb2c[0xe00 - 0xb2c]; +- __be32 clkocr; /* 0x.0e00 - Clock Out Select Register */ ++ u32 clkocr; /* 0x.0e00 - Clock Out Select Register */ + u8 rese04[0xe10 - 0xe04]; +- __be32 ddrdllcr; /* 0x.0e10 - DDR DLL Control Register */ ++ u32 ddrdllcr; /* 0x.0e10 - DDR DLL Control Register */ + u8 rese14[0xe20 - 0xe14]; +- __be32 lbcdllcr; /* 0x.0e20 - LBC DLL Control Register */ +- __be32 cpfor; /* 0x.0e24 - L2 charge pump fuse override register */ ++ u32 lbcdllcr; /* 0x.0e20 - LBC DLL Control Register */ ++ u32 cpfor; /* 0x.0e24 - L2 charge pump fuse override ++ * register ++ */ + u8 rese28[0xf04 - 0xe28]; +- __be32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */ +- __be32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */ ++ u32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */ ++ u32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */ + u8 resf0c[0xf2c - 0xf0c]; +- __be32 itcr; /* 0x.0f2c - Internal transaction control register */ ++ u32 itcr; /* 0x.0f2c - Internal transaction control ++ * register ++ */ + u8 resf30[0xf40 - 0xf30]; +- __be32 srds2cr0; /* 0x.0f40 - SerDes2 Control Register 0 */ +- __be32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */ ++ u32 srds2cr0; /* 0x.0f40 - SerDes2 Control Register 0 */ ++ u32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */ + } __attribute__ ((packed)); + ++u32 fsl_guts_get_svr(void); + + /* Alternate function signal multiplex control */ + #define MPC85xx_PMUXCR_QE(x) (0x8000 >> (x)) diff --git a/target/linux/layerscape/patches-4.9/820-base-soc-Introduce-soc_device_match-interface.patch b/target/linux/layerscape/patches-4.9/820-base-soc-Introduce-soc_device_match-interface.patch deleted file mode 100644 index ec9e26191f..0000000000 --- a/target/linux/layerscape/patches-4.9/820-base-soc-Introduce-soc_device_match-interface.patch +++ /dev/null @@ -1,162 +0,0 @@ -From c97db7cc7778e34a53b42d58c766f0ec0e30d580 Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann -Date: Wed, 21 Sep 2016 14:57:19 +0800 -Subject: [PATCH] base: soc: Introduce soc_device_match() interface - -We keep running into cases where device drivers want to know the exact -version of the a SoC they are currently running on. In the past, this has -usually been done through a vendor specific API that can be called by a -driver, or by directly accessing some kind of version register that is -not part of the device itself but that belongs to a global register area -of the chip. - -Common reasons for doing this include: - -- A machine is not using devicetree or similar for passing data about - on-chip devices, but just announces their presence using boot-time - platform devices, and the machine code itself does not care about the - revision. - -- There is existing firmware or boot loaders with existing DT binaries - with generic compatible strings that do not identify the particular - revision of each device, but the driver knows which SoC revisions - include which part. - -- A prerelease version of a chip has some quirks and we are using the same - version of the bootloader and the DT blob on both the prerelease and the - final version. An update of the DT binding seems inappropriate because - that would involve maintaining multiple copies of the dts and/or - bootloader. - -This patch introduces the soc_device_match() interface that is meant to -work like of_match_node() but instead of identifying the version of a -device, it identifies the SoC itself using a vendor-agnostic interface. - -Unlike of_match_node(), we do not do an exact string compare but instead -use glob_match() to allow wildcards in strings. - -Signed-off-by: Arnd Bergmann -Signed-off-by: Yangbo Lu -Signed-off-by: Geert Uytterhoeven -Acked-by: Greg Kroah-Hartman ---- - drivers/base/Kconfig | 1 + - drivers/base/soc.c | 66 +++++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/sys_soc.h | 3 +++ - 3 files changed, 70 insertions(+) - -diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig -index fdf44cac08e6..991b21e1f89b 100644 ---- a/drivers/base/Kconfig -+++ b/drivers/base/Kconfig -@@ -235,6 +235,7 @@ config GENERIC_CPU_AUTOPROBE - - config SOC_BUS - bool -+ select GLOB - - source "drivers/base/regmap/Kconfig" - -diff --git a/drivers/base/soc.c b/drivers/base/soc.c -index 028cef377fd4..04ee597fc3a3 100644 ---- a/drivers/base/soc.c -+++ b/drivers/base/soc.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - - static DEFINE_IDA(soc_ida); - -@@ -168,3 +169,68 @@ static int __init soc_bus_register(void) - return bus_register(&soc_bus_type); - } - core_initcall(soc_bus_register); -+ -+static int soc_device_match_one(struct device *dev, void *arg) -+{ -+ struct soc_device *soc_dev = container_of(dev, struct soc_device, dev); -+ const struct soc_device_attribute *match = arg; -+ -+ if (match->machine && -+ !glob_match(match->machine, soc_dev->attr->machine)) -+ return 0; -+ -+ if (match->family && -+ !glob_match(match->family, soc_dev->attr->family)) -+ return 0; -+ -+ if (match->revision && -+ !glob_match(match->revision, soc_dev->attr->revision)) -+ return 0; -+ -+ if (match->soc_id && -+ !glob_match(match->soc_id, soc_dev->attr->soc_id)) -+ return 0; -+ -+ return 1; -+} -+ -+/* -+ * soc_device_match - identify the SoC in the machine -+ * @matches: zero-terminated array of possible matches -+ * -+ * returns the first matching entry of the argument array, or NULL -+ * if none of them match. -+ * -+ * This function is meant as a helper in place of of_match_node() -+ * in cases where either no device tree is available or the information -+ * in a device node is insufficient to identify a particular variant -+ * by its compatible strings or other properties. For new devices, -+ * the DT binding should always provide unique compatible strings -+ * that allow the use of of_match_node() instead. -+ * -+ * The calling function can use the .data entry of the -+ * soc_device_attribute to pass a structure or function pointer for -+ * each entry. -+ */ -+const struct soc_device_attribute *soc_device_match( -+ const struct soc_device_attribute *matches) -+{ -+ int ret = 0; -+ -+ if (!matches) -+ return NULL; -+ -+ while (!ret) { -+ if (!(matches->machine || matches->family || -+ matches->revision || matches->soc_id)) -+ break; -+ ret = bus_for_each_dev(&soc_bus_type, NULL, (void *)matches, -+ soc_device_match_one); -+ if (!ret) -+ matches++; -+ else -+ return matches; -+ } -+ return NULL; -+} -+EXPORT_SYMBOL_GPL(soc_device_match); -diff --git a/include/linux/sys_soc.h b/include/linux/sys_soc.h -index 2739ccb69571..9f5eb06f9fd8 100644 ---- a/include/linux/sys_soc.h -+++ b/include/linux/sys_soc.h -@@ -13,6 +13,7 @@ struct soc_device_attribute { - const char *family; - const char *revision; - const char *soc_id; -+ const void *data; - }; - - /** -@@ -34,4 +35,6 @@ void soc_device_unregister(struct soc_device *soc_dev); - */ - struct device *soc_device_to_device(struct soc_device *soc); - -+const struct soc_device_attribute *soc_device_match( -+ const struct soc_device_attribute *matches); - #endif /* __SOC_BUS_H */ --- -2.11.1 - diff --git a/target/linux/layerscape/patches-4.9/821-guts-support-layerscape.patch b/target/linux/layerscape/patches-4.9/821-guts-support-layerscape.patch deleted file mode 100644 index ffda8a6cf8..0000000000 --- a/target/linux/layerscape/patches-4.9/821-guts-support-layerscape.patch +++ /dev/null @@ -1,452 +0,0 @@ -From d51e307e4ecf51832c9e3bc30acb5dbd559d5f4d Mon Sep 17 00:00:00 2001 -From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:19:34 +0800 -Subject: [PATCH] guts: support layerscape - -This is a integrated patch for layerscape guts support. - -Signed-off-by: Roy Pledge -Signed-off-by: Geert Uytterhoeven -Signed-off-by: Amrita Kumari -Signed-off-by: Yangbo Lu ---- - drivers/base/soc.c | 12 ++- - drivers/soc/fsl/guts.c | 238 +++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/fsl/guts.h | 125 +++++++++++++++---------- - 3 files changed, 323 insertions(+), 52 deletions(-) - create mode 100644 drivers/soc/fsl/guts.c - ---- a/drivers/base/soc.c -+++ b/drivers/base/soc.c -@@ -167,19 +167,23 @@ static int soc_device_match_one(struct d - const struct soc_device_attribute *match = arg; - - if (match->machine && -- !glob_match(match->machine, soc_dev->attr->machine)) -+ (!soc_dev->attr->machine || -+ !glob_match(match->machine, soc_dev->attr->machine))) - return 0; - - if (match->family && -- !glob_match(match->family, soc_dev->attr->family)) -+ (!soc_dev->attr->family || -+ !glob_match(match->family, soc_dev->attr->family))) - return 0; - - if (match->revision && -- !glob_match(match->revision, soc_dev->attr->revision)) -+ (!soc_dev->attr->revision || -+ !glob_match(match->revision, soc_dev->attr->revision))) - return 0; - - if (match->soc_id && -- !glob_match(match->soc_id, soc_dev->attr->soc_id)) -+ (!soc_dev->attr->soc_id || -+ !glob_match(match->soc_id, soc_dev->attr->soc_id))) - return 0; - - return 1; ---- /dev/null -+++ b/drivers/soc/fsl/guts.c -@@ -0,0 +1,238 @@ -+/* -+ * Freescale QorIQ Platforms GUTS Driver -+ * -+ * Copyright (C) 2016 Freescale Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct guts { -+ struct ccsr_guts __iomem *regs; -+ bool little_endian; -+}; -+ -+struct fsl_soc_die_attr { -+ char *die; -+ u32 svr; -+ u32 mask; -+}; -+ -+static struct guts *guts; -+static struct soc_device_attribute soc_dev_attr; -+static struct soc_device *soc_dev; -+ -+ -+/* SoC die attribute definition for QorIQ platform */ -+static const struct fsl_soc_die_attr fsl_soc_die[] = { -+ /* -+ * Power Architecture-based SoCs T Series -+ */ -+ -+ /* Die: T4240, SoC: T4240/T4160/T4080 */ -+ { .die = "T4240", -+ .svr = 0x82400000, -+ .mask = 0xfff00000, -+ }, -+ /* Die: T1040, SoC: T1040/T1020/T1042/T1022 */ -+ { .die = "T1040", -+ .svr = 0x85200000, -+ .mask = 0xfff00000, -+ }, -+ /* Die: T2080, SoC: T2080/T2081 */ -+ { .die = "T2080", -+ .svr = 0x85300000, -+ .mask = 0xfff00000, -+ }, -+ /* Die: T1024, SoC: T1024/T1014/T1023/T1013 */ -+ { .die = "T1024", -+ .svr = 0x85400000, -+ .mask = 0xfff00000, -+ }, -+ -+ /* -+ * ARM-based SoCs LS Series -+ */ -+ -+ /* Die: LS1043A, SoC: LS1043A/LS1023A */ -+ { .die = "LS1043A", -+ .svr = 0x87920000, -+ .mask = 0xffff0000, -+ }, -+ /* Die: LS2080A, SoC: LS2080A/LS2040A/LS2085A */ -+ { .die = "LS2080A", -+ .svr = 0x87010000, -+ .mask = 0xff3f0000, -+ }, -+ /* Die: LS1088A, SoC: LS1088A/LS1048A/LS1084A/LS1044A */ -+ { .die = "LS1088A", -+ .svr = 0x87030000, -+ .mask = 0xff3f0000, -+ }, -+ /* Die: LS1012A, SoC: LS1012A */ -+ { .die = "LS1012A", -+ .svr = 0x87040000, -+ .mask = 0xffff0000, -+ }, -+ /* Die: LS1046A, SoC: LS1046A/LS1026A */ -+ { .die = "LS1046A", -+ .svr = 0x87070000, -+ .mask = 0xffff0000, -+ }, -+ /* Die: LS2088A, SoC: LS2088A/LS2048A/LS2084A/LS2044A */ -+ { .die = "LS2088A", -+ .svr = 0x87090000, -+ .mask = 0xff3f0000, -+ }, -+ /* Die: LS1021A, SoC: LS1021A/LS1020A/LS1022A */ -+ { .die = "LS1021A", -+ .svr = 0x87000000, -+ .mask = 0xfff70000, -+ }, -+ { }, -+}; -+ -+static const struct fsl_soc_die_attr *fsl_soc_die_match( -+ u32 svr, const struct fsl_soc_die_attr *matches) -+{ -+ while (matches->svr) { -+ if (matches->svr == (svr & matches->mask)) -+ return matches; -+ matches++; -+ }; -+ return NULL; -+} -+ -+u32 fsl_guts_get_svr(void) -+{ -+ u32 svr = 0; -+ -+ if (!guts || !guts->regs) -+ return svr; -+ -+ if (guts->little_endian) -+ svr = ioread32(&guts->regs->svr); -+ else -+ svr = ioread32be(&guts->regs->svr); -+ -+ return svr; -+} -+EXPORT_SYMBOL(fsl_guts_get_svr); -+ -+static int fsl_guts_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct device *dev = &pdev->dev; -+ struct resource *res; -+ const struct fsl_soc_die_attr *soc_die; -+ const char *machine; -+ u32 svr; -+ -+ /* Initialize guts */ -+ guts = devm_kzalloc(dev, sizeof(*guts), GFP_KERNEL); -+ if (!guts) -+ return -ENOMEM; -+ -+ guts->little_endian = of_property_read_bool(np, "little-endian"); -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ guts->regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(guts->regs)) -+ return PTR_ERR(guts->regs); -+ -+ /* Register soc device */ -+ machine = of_flat_dt_get_machine_name(); -+ if (machine) -+ soc_dev_attr.machine = devm_kstrdup(dev, machine, GFP_KERNEL); -+ -+ svr = fsl_guts_get_svr(); -+ soc_die = fsl_soc_die_match(svr, fsl_soc_die); -+ if (soc_die) { -+ soc_dev_attr.family = devm_kasprintf(dev, GFP_KERNEL, -+ "QorIQ %s", soc_die->die); -+ } else { -+ soc_dev_attr.family = devm_kasprintf(dev, GFP_KERNEL, "QorIQ"); -+ } -+ soc_dev_attr.soc_id = devm_kasprintf(dev, GFP_KERNEL, -+ "svr:0x%08x", svr); -+ soc_dev_attr.revision = devm_kasprintf(dev, GFP_KERNEL, "%d.%d", -+ (svr >> 4) & 0xf, svr & 0xf); -+ -+ soc_dev = soc_device_register(&soc_dev_attr); -+ if (IS_ERR(soc_dev)) -+ return PTR_ERR(soc_dev); -+ -+ pr_info("Machine: %s\n", soc_dev_attr.machine); -+ pr_info("SoC family: %s\n", soc_dev_attr.family); -+ pr_info("SoC ID: %s, Revision: %s\n", -+ soc_dev_attr.soc_id, soc_dev_attr.revision); -+ return 0; -+} -+ -+static int fsl_guts_remove(struct platform_device *dev) -+{ -+ soc_device_unregister(soc_dev); -+ return 0; -+} -+ -+/* -+ * Table for matching compatible strings, for device tree -+ * guts node, for Freescale QorIQ SOCs. -+ */ -+static const struct of_device_id fsl_guts_of_match[] = { -+ { .compatible = "fsl,qoriq-device-config-1.0", }, -+ { .compatible = "fsl,qoriq-device-config-2.0", }, -+ { .compatible = "fsl,p1010-guts", }, -+ { .compatible = "fsl,p1020-guts", }, -+ { .compatible = "fsl,p1021-guts", }, -+ { .compatible = "fsl,p1022-guts", }, -+ { .compatible = "fsl,p1023-guts", }, -+ { .compatible = "fsl,p2020-guts", }, -+ { .compatible = "fsl,bsc9131-guts", }, -+ { .compatible = "fsl,bsc9132-guts", }, -+ { .compatible = "fsl,mpc8536-guts", }, -+ { .compatible = "fsl,mpc8544-guts", }, -+ { .compatible = "fsl,mpc8548-guts", }, -+ { .compatible = "fsl,mpc8568-guts", }, -+ { .compatible = "fsl,mpc8569-guts", }, -+ { .compatible = "fsl,mpc8572-guts", }, -+ { .compatible = "fsl,ls1021a-dcfg", }, -+ { .compatible = "fsl,ls1043a-dcfg", }, -+ { .compatible = "fsl,ls1046a-dcfg", }, -+ { .compatible = "fsl,ls2080a-dcfg", }, -+ { .compatible = "fsl,ls1088a-dcfg", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, fsl_guts_of_match); -+ -+static struct platform_driver fsl_guts_driver = { -+ .driver = { -+ .name = "fsl-guts", -+ .of_match_table = fsl_guts_of_match, -+ }, -+ .probe = fsl_guts_probe, -+ .remove = fsl_guts_remove, -+}; -+ -+static int __init fsl_guts_init(void) -+{ -+ return platform_driver_register(&fsl_guts_driver); -+} -+core_initcall(fsl_guts_init); -+ -+static void __exit fsl_guts_exit(void) -+{ -+ platform_driver_unregister(&fsl_guts_driver); -+} -+module_exit(fsl_guts_exit); ---- a/include/linux/fsl/guts.h -+++ b/include/linux/fsl/guts.h -@@ -29,83 +29,112 @@ - * #ifdefs. - */ - struct ccsr_guts { -- __be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ -- __be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */ -- __be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */ -- __be32 pordevsr; /* 0x.000c - POR I/O Device Status Register */ -- __be32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */ -- __be32 pordevsr2; /* 0x.0014 - POR device status register 2 */ -+ u32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ -+ u32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */ -+ u32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and -+ * Control Register -+ */ -+ u32 pordevsr; /* 0x.000c - POR I/O Device Status Register */ -+ u32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */ -+ u32 pordevsr2; /* 0x.0014 - POR device status register 2 */ - u8 res018[0x20 - 0x18]; -- __be32 porcir; /* 0x.0020 - POR Configuration Information Register */ -+ u32 porcir; /* 0x.0020 - POR Configuration Information -+ * Register -+ */ - u8 res024[0x30 - 0x24]; -- __be32 gpiocr; /* 0x.0030 - GPIO Control Register */ -+ u32 gpiocr; /* 0x.0030 - GPIO Control Register */ - u8 res034[0x40 - 0x34]; -- __be32 gpoutdr; /* 0x.0040 - General-Purpose Output Data Register */ -+ u32 gpoutdr; /* 0x.0040 - General-Purpose Output Data -+ * Register -+ */ - u8 res044[0x50 - 0x44]; -- __be32 gpindr; /* 0x.0050 - General-Purpose Input Data Register */ -+ u32 gpindr; /* 0x.0050 - General-Purpose Input Data -+ * Register -+ */ - u8 res054[0x60 - 0x54]; -- __be32 pmuxcr; /* 0x.0060 - Alternate Function Signal Multiplex Control */ -- __be32 pmuxcr2; /* 0x.0064 - Alternate function signal multiplex control 2 */ -- __be32 dmuxcr; /* 0x.0068 - DMA Mux Control Register */ -+ u32 pmuxcr; /* 0x.0060 - Alternate Function Signal -+ * Multiplex Control -+ */ -+ u32 pmuxcr2; /* 0x.0064 - Alternate function signal -+ * multiplex control 2 -+ */ -+ u32 dmuxcr; /* 0x.0068 - DMA Mux Control Register */ - u8 res06c[0x70 - 0x6c]; -- __be32 devdisr; /* 0x.0070 - Device Disable Control */ -+ u32 devdisr; /* 0x.0070 - Device Disable Control */ - #define CCSR_GUTS_DEVDISR_TB1 0x00001000 - #define CCSR_GUTS_DEVDISR_TB0 0x00004000 -- __be32 devdisr2; /* 0x.0074 - Device Disable Control 2 */ -+ u32 devdisr2; /* 0x.0074 - Device Disable Control 2 */ - u8 res078[0x7c - 0x78]; -- __be32 pmjcr; /* 0x.007c - 4 Power Management Jog Control Register */ -- __be32 powmgtcsr; /* 0x.0080 - Power Management Status and Control Register */ -- __be32 pmrccr; /* 0x.0084 - Power Management Reset Counter Configuration Register */ -- __be32 pmpdccr; /* 0x.0088 - Power Management Power Down Counter Configuration Register */ -- __be32 pmcdr; /* 0x.008c - 4Power management clock disable register */ -- __be32 mcpsumr; /* 0x.0090 - Machine Check Summary Register */ -- __be32 rstrscr; /* 0x.0094 - Reset Request Status and Control Register */ -- __be32 ectrstcr; /* 0x.0098 - Exception reset control register */ -- __be32 autorstsr; /* 0x.009c - Automatic reset status register */ -- __be32 pvr; /* 0x.00a0 - Processor Version Register */ -- __be32 svr; /* 0x.00a4 - System Version Register */ -+ u32 pmjcr; /* 0x.007c - 4 Power Management Jog Control -+ * Register -+ */ -+ u32 powmgtcsr; /* 0x.0080 - Power Management Status and -+ * Control Register -+ */ -+ u32 pmrccr; /* 0x.0084 - Power Management Reset Counter -+ * Configuration Register -+ */ -+ u32 pmpdccr; /* 0x.0088 - Power Management Power Down Counter -+ * Configuration Register -+ */ -+ u32 pmcdr; /* 0x.008c - 4Power management clock disable -+ * register -+ */ -+ u32 mcpsumr; /* 0x.0090 - Machine Check Summary Register */ -+ u32 rstrscr; /* 0x.0094 - Reset Request Status and -+ * Control Register -+ */ -+ u32 ectrstcr; /* 0x.0098 - Exception reset control register */ -+ u32 autorstsr; /* 0x.009c - Automatic reset status register */ -+ u32 pvr; /* 0x.00a0 - Processor Version Register */ -+ u32 svr; /* 0x.00a4 - System Version Register */ - u8 res0a8[0xb0 - 0xa8]; -- __be32 rstcr; /* 0x.00b0 - Reset Control Register */ -+ u32 rstcr; /* 0x.00b0 - Reset Control Register */ - u8 res0b4[0xc0 - 0xb4]; -- __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register -+ u32 iovselsr; /* 0x.00c0 - I/O voltage select status register - Called 'elbcvselcr' on 86xx SOCs */ - u8 res0c4[0x100 - 0xc4]; -- __be32 rcwsr[16]; /* 0x.0100 - Reset Control Word Status registers -+ u32 rcwsr[16]; /* 0x.0100 - Reset Control Word Status registers - There are 16 registers */ - u8 res140[0x224 - 0x140]; -- __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */ -- __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */ -+ u32 iodelay1; /* 0x.0224 - IO delay control register 1 */ -+ u32 iodelay2; /* 0x.0228 - IO delay control register 2 */ - u8 res22c[0x604 - 0x22c]; -- __be32 pamubypenr; /* 0x.604 - PAMU bypass enable register */ -+ u32 pamubypenr; /* 0x.604 - PAMU bypass enable register */ - u8 res608[0x800 - 0x608]; -- __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */ -+ u32 clkdvdr; /* 0x.0800 - Clock Divide Register */ - u8 res804[0x900 - 0x804]; -- __be32 ircr; /* 0x.0900 - Infrared Control Register */ -+ u32 ircr; /* 0x.0900 - Infrared Control Register */ - u8 res904[0x908 - 0x904]; -- __be32 dmacr; /* 0x.0908 - DMA Control Register */ -+ u32 dmacr; /* 0x.0908 - DMA Control Register */ - u8 res90c[0x914 - 0x90c]; -- __be32 elbccr; /* 0x.0914 - eLBC Control Register */ -+ u32 elbccr; /* 0x.0914 - eLBC Control Register */ - u8 res918[0xb20 - 0x918]; -- __be32 ddr1clkdr; /* 0x.0b20 - DDR1 Clock Disable Register */ -- __be32 ddr2clkdr; /* 0x.0b24 - DDR2 Clock Disable Register */ -- __be32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */ -+ u32 ddr1clkdr; /* 0x.0b20 - DDR1 Clock Disable Register */ -+ u32 ddr2clkdr; /* 0x.0b24 - DDR2 Clock Disable Register */ -+ u32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */ - u8 resb2c[0xe00 - 0xb2c]; -- __be32 clkocr; /* 0x.0e00 - Clock Out Select Register */ -+ u32 clkocr; /* 0x.0e00 - Clock Out Select Register */ - u8 rese04[0xe10 - 0xe04]; -- __be32 ddrdllcr; /* 0x.0e10 - DDR DLL Control Register */ -+ u32 ddrdllcr; /* 0x.0e10 - DDR DLL Control Register */ - u8 rese14[0xe20 - 0xe14]; -- __be32 lbcdllcr; /* 0x.0e20 - LBC DLL Control Register */ -- __be32 cpfor; /* 0x.0e24 - L2 charge pump fuse override register */ -+ u32 lbcdllcr; /* 0x.0e20 - LBC DLL Control Register */ -+ u32 cpfor; /* 0x.0e24 - L2 charge pump fuse override -+ * register -+ */ - u8 rese28[0xf04 - 0xe28]; -- __be32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */ -- __be32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */ -+ u32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */ -+ u32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */ - u8 resf0c[0xf2c - 0xf0c]; -- __be32 itcr; /* 0x.0f2c - Internal transaction control register */ -+ u32 itcr; /* 0x.0f2c - Internal transaction control -+ * register -+ */ - u8 resf30[0xf40 - 0xf30]; -- __be32 srds2cr0; /* 0x.0f40 - SerDes2 Control Register 0 */ -- __be32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */ -+ u32 srds2cr0; /* 0x.0f40 - SerDes2 Control Register 0 */ -+ u32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */ - } __attribute__ ((packed)); - -+u32 fsl_guts_get_svr(void); - - /* Alternate function signal multiplex control */ - #define MPC85xx_PMUXCR_QE(x) (0x8000 >> (x))