From: Jagan Teki <jagan@amarulasolutions.com>
Date: Sun, 24 May 2020 16:43:15 +0000 (+0530)
Subject: clk: rk3399: Fix eMMC get_clk reg offset
X-Git-Tag: v2020.07-rc4~16^2~31
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=4648108c63d9d06cf882f8d216d5e3e13e272aea;p=oweals%2Fu-boot.git

clk: rk3399: Fix eMMC get_clk reg offset

Actual eMMC get_clk register is clksel_con22 instead of
clksel_con21.

Fix it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 6a78837619..4caf3b5617 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -728,7 +728,7 @@ static ulong rk3399_mmc_get_clk(struct rockchip_cru *cru, uint clk_id)
 		div = 2;
 		break;
 	case SCLK_EMMC:
-		con = readl(&cru->clksel_con[21]);
+		con = readl(&cru->clksel_con[22]);
 		div = 1;
 		break;
 	default: