From: Urja Rannikko <urjaman@gmail.com>
Date: Wed, 13 May 2020 19:15:20 +0000 (+0000)
Subject: rockchip: spl: veyron speedy boots from SPI
X-Git-Tag: v2020.07-rc3~5^2~4
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=353ad95aa6562654726a91cb457f30d5f2a85f4c;p=oweals%2Fu-boot.git

rockchip: spl: veyron speedy boots from SPI

Apparently speedy was forgotten from this list of veyron devices.

Fixes: 49105fb7ed ("rockchip: add common spl board file")
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index ec2f66d188..46b32eb345 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -53,7 +53,8 @@ u32 spl_boot_device(void)
 
 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
 		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
-		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
+		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
+		defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
 	return BOOT_DEVICE_SPI;
 #endif
 	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))