From: Piotr Dymacz Date: Sat, 11 Feb 2017 19:53:56 +0000 (+0100) Subject: Add support for P&W R602N and CPE505N (QCA9531 based) X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=35196baa3adcc840f3104f330522fb71664baf74;p=oweals%2Fu-boot_mod.git Add support for P&W R602N and CPE505N (QCA9531 based) --- diff --git a/Makefile b/Makefile index 10863b3..5bc8c38 100644 --- a/Makefile +++ b/Makefile @@ -247,6 +247,13 @@ d-link_dir-505: dragino_v2_ms14: @$(call build,192,1,DEVICE_VENDOR=dragino) +p2w_cpe505n \ +p2w_r602n \ +yuncore_ap90q \ +yuncore_cpe830 \ +zbtlink_zbt-we1526: + @$(call build,256,1,ETH_CONFIG=_s27) + tp-link_tl-wdr3600 \ tp-link_tl-wdr43x0: @$(call build,123,1,ETH_CONFIG=_s17) @@ -260,16 +267,9 @@ village-telco_mesh-potato_v2: wallys_dr531: @$(call build,192,1,ETH_CONFIG=_s27) -yuncore_ap90q \ -yuncore_cpe830: - @$(call build,256,1,ETH_CONFIG=_s27) - yuncore_cpe870: @$(call build,64,1,ETH_CONFIG=_s27) -zbtlink_zbt-we1526: - @$(call build,256,1,ETH_CONFIG=_s27) - # ============= # CLEAN TARGETS # ============= diff --git a/README.md b/README.md index 9dcffdd..d611038 100644 --- a/README.md +++ b/README.md @@ -107,6 +107,8 @@ Currently supported devices: - Comfast CF-E520N/CF-E530N - YunCore AP90Q - YunCore CPE830 + - P&W CPE505N + - P&W R602N I tested this modification on most of these devices, with OpenWrt and OFW firmware. If you are not sure about the version of your device, please contact with me **before** you try to make an upgrade. Changing bootloader to a wrong version will probably damage your router and you will need special hardware to fix it, so please, **be very careful**. @@ -151,6 +153,8 @@ More information about supported devices: | YunCore AP90Q | QCA9531 | 16 MiB | 128 MiB DDR2 | 256 KiB | R/W | | YunCore CPE830 | QCA9531 | 16 MiB | 64 MiB DDR2 | 256 KiB | R/W | | YunCore CPE870 | AR9341 | 8 MiB | 64 MiB DDR2 | 64 KiB, LZMA | R/W | +| P&W CPE505N | QCA9531 | 16 MiB | 64 MiB DDR2 | 256 KiB | R/W | +| P&W R602N | QCA9531 | 16 MiB | 64 MiB DDR2 | 256 KiB | R/W | *(LZMA) - U-Boot binary image is compressed with LZMA.* *(R/W) - environment exists in separate FLASH block which allows you to save it and keep after power down.* diff --git a/u-boot/Makefile b/u-boot/Makefile index 9a33031..c719acd 100644 --- a/u-boot/Makefile +++ b/u-boot/Makefile @@ -453,6 +453,20 @@ gl-innovations_gl-inet-6416: ar933x_common @$(call define_add,CONFIG_FOR_GL_INET,1) @$(MKCONFIG) -a ap121 mips mips ap121 ar7240 ar7240 +p2w_cpe505n: qca953x_common + @$(call config_init,P&W CPE505N,cpe505n,16,17,1,QCA_QCA953X_SOC) + @$(call define_add,CONFIG_FOR_P2W_CPE505N,1) + @$(call define_add,CFG_ATHRS27_PHY,1) + @$(call define_add,CFG_ATH_GMAC_NMACS,2) + @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240 + +p2w_r602n: qca953x_common + @$(call config_init,P&W R602N,r602n,16,17,1,QCA_QCA953X_SOC) + @$(call define_add,CONFIG_FOR_P2W_R602N,1) + @$(call define_add,CFG_ATHRS27_PHY,1) + @$(call define_add,CFG_ATH_GMAC_NMACS,2) + @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240 + tp-link_tl-mr10u: ar933x_common @$(call config_init,TP-Link TL-MR10U,tl-mr10u,4,11,,QCA_AR933X_SOC) @$(call define_add,CONFIG_FOR_TPLINK_MR10U_V1,1) diff --git a/u-boot/include/configs/ap143.h b/u-boot/include/configs/ap143.h index 08dffb5..16313c2 100644 --- a/u-boot/include/configs/ap143.h +++ b/u-boot/include/configs/ap143.h @@ -48,6 +48,22 @@ #define CONFIG_QCA_GPIO_MASK_IN GPIO17 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L +#elif defined(CONFIG_FOR_P2W_CPE505N) + + #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO11 | GPIO12 |\ + GPIO14 | GPIO15 + #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L + #define CONFIG_QCA_GPIO_MASK_IN GPIO17 + #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L + +#elif defined(CONFIG_FOR_P2W_R602N) + + #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO11 | GPIO12 |\ + GPIO14 | GPIO15 | GPIO16 + #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L + #define CONFIG_QCA_GPIO_MASK_IN GPIO17 + #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L + #elif defined(CONFIG_FOR_TPLINK_WR810N) #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13 @@ -138,6 +154,16 @@ "rootfstype=jffs2 init=/sbin/init "\ "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)" +#elif defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ + defined(CONFIG_FOR_YUNCORE_CPE830) ||\ + defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) + + #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\ + "rootfstype=squashfs init=/sbin/init "\ + "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)" + #elif defined(CONFIG_FOR_TPLINK_WR810N) #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\ @@ -165,14 +191,6 @@ "rootfstype=jffs2 init=/sbin/init "\ "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)" -#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ - defined(CONFIG_FOR_YUNCORE_CPE830) ||\ - defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) - - #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\ - "rootfstype=squashfs init=/sbin/init "\ - "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)" - #endif /* @@ -191,14 +209,18 @@ defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\ defined(CONFIG_FOR_TPLINK_WR841N_V9) #define CFG_LOAD_ADDR 0x9F020000 -#elif defined(CONFIG_FOR_WALLYS_DR531) ||\ +#elif defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_WALLYS_DR531) ||\ defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ defined(CONFIG_FOR_YUNCORE_CPE830) ||\ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) #define CFG_LOAD_ADDR 0x9F050000 #endif -#if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ +#if defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ defined(CONFIG_FOR_YUNCORE_CPE830) ||\ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) #define CONFIG_BOOTCOMMAND "bootm 0x9F050000 || bootm 0x9FE80000" @@ -218,6 +240,14 @@ #define CFG_ENV_ADDR 0x9F018000 #define CFG_ENV_SIZE 0x7C00 #define CFG_ENV_SECT_SIZE 0x10000 +#elif defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ + defined(CONFIG_FOR_YUNCORE_CPE830) ||\ + defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) + #define CFG_ENV_ADDR 0x9F040000 + #define CFG_ENV_SIZE 0xFC00 + #define CFG_ENV_SECT_SIZE 0x10000 #elif defined(CONFIG_FOR_TPLINK_WR802N) ||\ defined(CONFIG_FOR_TPLINK_WR810N) ||\ defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\ @@ -231,12 +261,6 @@ #define CFG_ENV_ADDR 0x9F030000 #define CFG_ENV_SIZE 0xF800 #define CFG_ENV_SECT_SIZE 0x10000 -#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ - defined(CONFIG_FOR_YUNCORE_CPE830) ||\ - defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) - #define CFG_ENV_ADDR 0x9F040000 - #define CFG_ENV_SIZE 0xFC00 - #define CFG_ENV_SECT_SIZE 0x10000 #endif /* @@ -260,6 +284,14 @@ #define OFFSET_MAC_DATA_BLOCK 0x10000 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x10000 #define OFFSET_MAC_ADDRESS 0x00000 +#elif defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ + defined(CONFIG_FOR_YUNCORE_CPE830) ||\ + defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) + #define OFFSET_MAC_DATA_BLOCK 0xFF0000 + #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000 + #define OFFSET_MAC_ADDRESS 0x000000 #elif defined(CONFIG_FOR_TPLINK_WR802N) ||\ defined(CONFIG_FOR_TPLINK_WR810N) ||\ defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\ @@ -275,12 +307,6 @@ #define OFFSET_MAC_DATA_BLOCK 0x030000 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000 #define OFFSET_MAC_ADDRESS 0x00F810 -#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ - defined(CONFIG_FOR_YUNCORE_CPE830) ||\ - defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) - #define OFFSET_MAC_DATA_BLOCK 0xFF0000 - #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000 - #define OFFSET_MAC_ADDRESS 0x000000 #endif /* @@ -328,7 +354,9 @@ defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\ defined(CONFIG_FOR_TPLINK_WR841N_V9) #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (192 * 1024) -#elif defined(CONFIG_FOR_WALLYS_DR531) ||\ +#elif defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_WALLYS_DR531) ||\ defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ defined(CONFIG_FOR_YUNCORE_CPE830) ||\ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) @@ -362,18 +390,20 @@ #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x10000 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000 -#elif defined(CONFIG_FOR_WALLYS_DR531) - - #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x30000 - #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000 - -#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ +#elif defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ defined(CONFIG_FOR_YUNCORE_CPE830) ||\ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x40000 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000 +#elif defined(CONFIG_FOR_WALLYS_DR531) + + #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x30000 + #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000 + #endif /* @@ -385,6 +415,8 @@ !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\ !defined(CONFIG_FOR_COMFAST_CF_E520N) &&\ !defined(CONFIG_FOR_COMFAST_CF_E530N) &&\ + !defined(CONFIG_FOR_P2W_CPE505N) &&\ + !defined(CONFIG_FOR_P2W_R602N) &&\ !defined(CONFIG_FOR_WALLYS_DR531) &&\ !defined(CONFIG_FOR_YUNCORE_AP90Q) &&\ !defined(CONFIG_FOR_YUNCORE_CPE830) &&\ @@ -392,7 +424,9 @@ #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX 0x20000 #endif -#if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ +#if defined(CONFIG_FOR_P2W_CPE505N) ||\ + defined(CONFIG_FOR_P2W_R602N) ||\ + defined(CONFIG_FOR_YUNCORE_AP90Q) ||\ defined(CONFIG_FOR_YUNCORE_CPE830) ||\ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526) #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX 0x9F050000