From: Mark Marshall Date: Sun, 9 Sep 2012 23:06:03 +0000 (+0000) Subject: powerpc mpc85xx: Only clear TSR:WIS in watchdog_reset. X-Git-Tag: v2013.01-rc1~90^2~47 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=320d53da605d67b9d95622c5c6bfd5ac2c17ed58;p=oweals%2Fu-boot.git powerpc mpc85xx: Only clear TSR:WIS in watchdog_reset. We should only write TSR_WIS to the SPRN_TSR register in reset_85xx_watchdog. The old code would cause the timer interrupt to be acknowledged when the watchdog was reset, and we would then get no more timer interrupts. This bug would affect all mpc85xx boards that have the watchdog enabled. Signed-off-by: Mark Marshall Signed-off-by: Andy Fleming --- diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 5ddb29435c..a5048a1306 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -270,10 +270,7 @@ reset_85xx_watchdog(void) /* * Clear TSR(WIS) bit by writing 1 */ - unsigned long val; - val = mfspr(SPRN_TSR); - val |= TSR_WIS; - mtspr(SPRN_TSR, val); + mtspr(SPRN_TSR, TSR_WIS); } #endif /* CONFIG_WATCHDOG */