From: Masahiro Yamada Date: Fri, 22 Jul 2016 11:20:11 +0000 (+0900) Subject: ARM: uniphier: add clock/reset settings for xHCI of ProXstream2 X-Git-Tag: v2016.09-rc1~16 X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8;p=oweals%2Fu-boot.git ARM: uniphier: add clock/reset settings for xHCI of ProXstream2 Deassert resets and enable clock signals of xHCI blocks if the corresponding CONFIG is enabled. Signed-off-by: Masahiro Yamada --- diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 76bf856c9e..0d9240519c 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include "../init.h" @@ -32,12 +33,16 @@ void uniphier_pxs2_clk_init(void) tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, SC_RSTCTRL2); readl(SC_RSTCTRL2); /* dummy read */ + + tmp = readl(SC_RSTCTRL6); + tmp |= 0x37; + writel(tmp, SC_RSTCTRL6); #endif /* provide clocks */ tmp = readl(SC_CLKCTRL); #ifdef CONFIG_USB_XHCI_UNIPHIER - tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | + tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif #ifdef CONFIG_UNIPHIER_ETH diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index a0955893ef..ad58e10e23 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -1,7 +1,9 @@ /* * UniPhier SC (System Control) block registers * - * Copyright (C) 2011-2015 Masahiro Yamada + * Copyright (C) 2011-2015 Panasonic Corporation + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -68,6 +70,10 @@ #define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */ #define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */ +#define SC_RSTCTRL5 (SC_BASE_ADDR | 0x2010) + +#define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) + #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) #define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */ #define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */