From: Mario Six <mario.six@gdsys.cc>
Date: Mon, 21 Jan 2019 08:18:20 +0000 (+0100)
Subject: mpc83xx: Replace ppcDWstore with inline assembly
X-Git-Tag: v2019.07-rc3~13^2~29
X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=1e718f43de1bee73fe727597101865f81ff873f5;p=oweals%2Fu-boot.git

mpc83xx: Replace ppcDWstore with inline assembly

ppcDWstore/ppcDWload are hardly used by any board, but since they're
implemented in start.S, they're always present in every U-Boot image,
even if they're not needed.

Re-implement these fuctions in C with inline assembly, so that the
compiler can decide when to actually include them.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
---

diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 4ea4249aff..9c67099a17 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -229,3 +229,21 @@ int cpu_mmc_init(bd_t *bis)
 	return 0;
 #endif
 }
+
+void ppcDWstore(unsigned int *addr, unsigned int *value)
+{
+	asm("lfd 1, 0(%1)\n\t"
+	    "stfd 1, 0(%0)"
+	    :
+	    : "r" (addr), "r" (value)
+	    : "memory");
+}
+
+void ppcDWload(unsigned int *addr, unsigned int *ret)
+{
+	asm("lfd 1, 0(%0)\n\t"
+	    "stfd 1, 0(%1)"
+	    :
+	    : "r" (addr), "r" (ret)
+	    : "memory");
+}
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 9fbbf59ce2..f4a8a766c3 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -119,18 +119,6 @@ disable_addr_trans:
 	mtspr	SRR1, r3
 	rfi
 
-	.globl	ppcDWstore
-ppcDWstore:
-	lfd	1, 0(r4)
-	stfd	1, 0(r3)
-	blr
-
-	.globl	ppcDWload
-ppcDWload:
-	lfd	1, 0(r3)
-	stfd	1, 0(r4)
-	blr
-
 #ifndef CONFIG_DEFAULT_IMMR
 #error CONFIG_DEFAULT_IMMR must be defined
 #endif /* CONFIG_DEFAULT_IMMR */