From: Piotr Dymacz Date: Mon, 14 Mar 2016 00:10:52 +0000 (+0100) Subject: Add DDR_FSM_WAIT_CONTROL register address in common QC/A header X-Git-Url: https://git.librecmc.org/?a=commitdiff_plain;h=0334fb2270bb345f063776782c36a8dbd3253463;p=oweals%2Fu-boot_mod.git Add DDR_FSM_WAIT_CONTROL register address in common QC/A header --- diff --git a/u-boot/include/soc/qca_soc_common.h b/u-boot/include/soc/qca_soc_common.h index a032c61..1eb0a6f 100644 --- a/u-boot/include/soc/qca_soc_common.h +++ b/u-boot/include/soc/qca_soc_common.h @@ -95,6 +95,7 @@ #define QCA_AHB_MASTER_TOUT_MAX_REG QCA_DDR_CTRL_BASE_REG + 0x0CC #define QCA_AHB_MASTER_TOUT_CURR_REG QCA_DDR_CTRL_BASE_REG + 0x0D0 #define QCA_AHB_MASTER_TOUT_SLV_ADDR_REG QCA_DDR_CTRL_BASE_REG + 0x0D4 + #define QCA_DDR_FSM_WAIT_CTRL_REG QCA_DDR_CTRL_BASE_REG + 0x0E4 #define QCA_DDR_CTRL_CFG_REG QCA_DDR_CTRL_BASE_REG + 0x108 #define QCA_DDR_SELF_REFRESH_CTRL_REG QCA_DDR_CTRL_BASE_REG + 0x110 #define QCA_DDR_SELF_REFRESH_TIMER_REG QCA_DDR_CTRL_BASE_REG + 0x114