powerpc: P1020MBG: Separate from P1_P2_RDB_PC in Kconfig
authorYork Sun <york.sun@nxp.com>
Thu, 17 Nov 2016 21:12:38 +0000 (13:12 -0800)
committerYork Sun <york.sun@nxp.com>
Thu, 24 Nov 2016 07:42:08 +0000 (23:42 -0800)
Use TARGET_P1020MBG instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and other macros.

Remove macro CONFIG_P1020MBG.

Signed-off-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/Kconfig
board/freescale/p1_p2_rdb_pc/Kconfig
board/freescale/p1_p2_rdb_pc/ddr.c
board/freescale/p1_p2_rdb_pc/tlb.c
configs/P1020MBG-PC_36BIT_SDCARD_defconfig
configs/P1020MBG-PC_36BIT_defconfig
configs/P1020MBG-PC_SDCARD_defconfig
configs/P1020MBG-PC_defconfig
include/configs/p1_p2_rdb_pc.h
scripts/config_whitelist.txt

index d0c57a1db9509180a8d735ba34192d78f7e3f7f8..636e26f8aa9fcbd56c35df80226e59e9abd2845b 100644 (file)
@@ -116,6 +116,11 @@ config TARGET_P1023RDB
        bool "Support P1023RDB"
        select ARCH_P1023
 
+config TARGET_P1020MBG
+       bool "Support P1020MBG-PC"
+       select SUPPORT_SPL
+       select SUPPORT_TPL
+
 config TARGET_P1_P2_RDB_PC
        bool "Support p1_p2_rdb_pc"
        select SUPPORT_SPL
index d3352d2856f7b9bf7ed5ad2eac86b63cbee0329e..2c45560d2e05ce3b6a2fca58bc4afac28e229f17 100644 (file)
@@ -1,4 +1,5 @@
-if TARGET_P1_P2_RDB_PC
+if TARGET_P1_P2_RDB_PC || \
+       TARGET_P1020MBG
 
 config SYS_BOARD
        default "p1_p2_rdb_pc"
index 1f3793b853eba843c3b1fc53fc590e3949ecc112..a121256bf759e3389c18eb96e81a45292a4a9641 100644 (file)
@@ -78,7 +78,7 @@ dimm_params_t ddr_raw_timing = {
        .refresh_rate_ps = 7800000,
        .tfaw_ps = 30000,
 };
-#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
+#elif (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD))
 /* Micron MT41J512M8_187E */
 dimm_params_t ddr_raw_timing = {
        .n_ranks = 2,
index 1c0008b2e65750f8572ad95a3d6505a6b01d62ed..d88c06f1afd8cc16e4026dc5a1dcfc64949a5e07 100644 (file)
@@ -85,13 +85,13 @@ struct fsl_e_tlb_entry tlb_table[] = {
                        MAS3_SX|MAS3_SW|MAS3_SR, 0,
                        0, 8, BOOKE_PAGESZ_1G, 1),
 
-#if defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)
+#if defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD)
        /* 2G DDR on P1020MBG, map the second 1G */
        SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
                        CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, 9, BOOKE_PAGESZ_1G, 1),
-#endif /* P1020MBG */
+#endif /* TARGET_P1020MBG */
 #endif /* RAMBOOT/SPL */
 
 #ifdef CONFIG_SYS_INIT_L2_ADDR
index 9858190deb0f4a3ca02af7cf8c23e89e0a0d64dd..d3fb861e6eb34e61d03e270bf852cbaf542031a8 100644 (file)
@@ -6,13 +6,13 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1020MBG=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
index 3eb32f8bf4e2853dbdd76f3690af0dc399989e1d..ccf8398e50b61f3b91fdce6632f26d79f3b8e9e0 100644 (file)
@@ -1,12 +1,11 @@
 CONFIG_PPC=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1020MBG=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1020MBG"
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
index fe73db87690a5dc28964144b8463f9955fc3adf3..c9fdcc5030fa0a3a961d3c43febb7d86c1d563cf 100644 (file)
@@ -6,12 +6,12 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1020MBG=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
index 4f87745bfd445f0b01d44c1182b97253230c4d39..c83299358fb1aacda98098b039d7bc5d0471c62a 100644 (file)
@@ -1,11 +1,10 @@
 CONFIG_PPC=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1020MBG=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1020MBG"
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
index 523af5265f6305f3e4d3335233e696c3c7c5d1bb..25f19674de46adfdebf0717ab3c9b233c91cac5b 100644 (file)
@@ -10,7 +10,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#if defined(CONFIG_P1020MBG)
+#if defined(CONFIG_TARGET_P1020MBG)
 #define CONFIG_BOARDNAME "P1020MBG-PC"
 #define CONFIG_P1020
 #define CONFIG_VSC7385_ENET
 #define SPD_EEPROM_ADDRESS 0x52
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
-#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
+#if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD))
 #define CONFIG_SYS_SDRAM_SIZE_LAW      LAW_SIZE_2G
 #define CONFIG_CHIP_SELECTS_PER_CTRL   2
 #else
 /*
  * Local Bus Definitions
  */
-#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
+#if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_P1020RDB_PD))
 #define CONFIG_SYS_MAX_FLASH_SECT      512     /* 64M */
 #define CONFIG_SYS_FLASH_BASE          0xec000000
 #elif defined(CONFIG_P1020UTM)
index b2db329b11e076f806a517728bbfd5a8cee96f45..e2fddfa0799694f4f42aaa9b21a2237ce8284543 100644 (file)
@@ -3384,7 +3384,6 @@ CONFIG_OS_ENV_ADDR
 CONFIG_OTHBOOTARGS
 CONFIG_OVERWRITE_ETHADDR_ONCE
 CONFIG_P1020
-CONFIG_P1020MBG
 CONFIG_P1020RDB_PC
 CONFIG_P1020RDB_PD
 CONFIG_P1020UTM