Add support for EnGenius ENS202EXT (AR9341 based)
authorMarty Plummer <ntzrmtthihu777@gmail.com>
Sun, 16 Apr 2017 07:36:04 +0000 (02:36 -0500)
committerPiotr Dymacz <pepe2k@gmail.com>
Fri, 7 Jul 2017 15:46:59 +0000 (17:46 +0200)
Signed-off-by: Marty Plummer <ntzrmtthihu777@gmail.com>
Makefile
README.md
u-boot/Makefile
u-boot/include/configs/db12x.h

index e37bad3827cf72cfcb788a3749c09bfce6c8af39..764b9fedb4596f17f32dba27c2278176c3ef4680 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -260,6 +260,7 @@ d-link_dir-505:
 dragino_v2_ms14:
        @$(call build,192,1,DEVICE_VENDOR=dragino)
 
+engenius_ens202ext \
 p2w_cpe505n \
 p2w_r602n \
 yuncore_ap90q \
index cce4eb1606f1c8ebe9c7723b90b118e0dbff72e5..6e27c72896ac4be5618754001162a39b3c023986 100644 (file)
--- a/README.md
+++ b/README.md
@@ -85,6 +85,7 @@ Currently supported devices:
   - D-Link DIR-505 H/W ver. A1 ([photos in my gallery](http://galeria.tech-blog.pl/D-Link_DIR-505/))
 
 - **Atheros AR9341**:
+  - EnGenius ENS202EXT
   - TP-Link TL-MR3420 v2
   - TP-Link TL-WA801ND v2
   - TP-Link TL-WA830RE v2
@@ -129,6 +130,7 @@ More information about supported devices:
 | CreatComm Technology D3321| AR9331 | 8 MiB | 32 MiB DDR1 | 256 KiB | RW |
 | [D-Link DIR-505 H/W ver. A1](http://wiki.openwrt.org/toh/d-link/dir-505) | AR1311 | 8 MiB | 64 MiB DDR2 | 64 KiB, LZMA | RO |
 | [Dragino 2 (MS14)](http://wiki.openwrt.org/toh/dragino/ms14) | AR9331 | 16 MiB | 64 MiB DDR1 | 192 KiB | R/W |
+| [EnGenius ENS202EXT](https://wiki.openwrt.org/toh/engenius/engenius_ens202ext_1.0.0) | AR9341 | 16 MiB | 64 MiB DDR1 | 256 KiB | R/W |
 | GL Innovations GL-AR150 | AR9331 | 16 MiB | 64 MiB DDR2 | 256 KiB | 64 KiB, R/W |
 | [GL Innovations GL.iNet 64xxA](http://wiki.openwrt.org/toh/gl-inet/gl-inet) | AR9331 | 8/16 MiB | 64 MiB DDR1 | 64 KiB | RO |
 | GS-Oolite/Elink EL-M150 module | AR9331 | 4/8/16 MiB | 64 MiB DDR2 | 64 KiB, LZMA | RO |
index 20b4bead3c9a3e9b3f132e5a8b2dcc45d0cb0d84..b746e96f622b83aa91876815dadc78e46082ba1c 100644 (file)
@@ -446,6 +446,13 @@ dragino_v2_ms14: ar933x_common
        @$(call define_add,WEBFAILSAFE_DISABLE_UBOOT_UPGRADE,1)
        @$(MKCONFIG) -a ap121 mips mips ap121 ar7240 ar7240
 
+engenius_ens202ext: ar934x_common
+       @$(call config_init,EnGenius ENS202EXT,ens202ext,16,1,1,QCA_AR9341_SOC)
+       @$(call define_add,CONFIG_FOR_ENGENIUS_ENS202EXT,1)
+       @$(call define_add,CFG_ATHRS27_PHY,1)
+       @$(call define_add,CFG_AG7240_NMACS,2)
+       @$(MKCONFIG) -a db12x mips mips db12x ar7240 ar7240
+
 gainstrong_oolite_v1_dev: ar933x_common
        @$(call config_init,Gainstrong Oolite v1 (dev board),oolite-v1,16,11,,QCA_AR933X_SOC)
        @$(call define_add,CONFIG_FOR_GS_OOLITE_V1_DEV,1)
index 8dd3dd28ee73cc2bf9570901e741c7b4ed86f1bd..742d7614f81fe2c3423601cfbcdb0054d23551f1 100644 (file)
  * GPIO configuration
  * ==================
  */
-#if defined(CONFIG_FOR_TPLINK_WDR3600_V1) ||\
-    defined(CONFIG_FOR_TPLINK_WDR43X0_V1)
+#if defined(CONFIG_FOR_ENGENIUS_ENS202EXT)
+
+       #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0  | GPIO14 | GPIO16 |\
+                                               GPIO17 | GPIO18
+       #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
+       #define CONFIG_QCA_GPIO_MASK_IN         GPIO1
+       #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
+
+#elif defined(CONFIG_FOR_TPLINK_WDR3600_V1) ||\
+      defined(CONFIG_FOR_TPLINK_WDR43X0_V1)
 
        #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
                                                GPIO14 | GPIO15
  * Default bootargs
  * ================
  */
-#if defined(CONFIG_FOR_TPLINK_WDR3500_V1) ||\
-    defined(CONFIG_FOR_TPLINK_WDR3600_V1) ||\
-    defined(CONFIG_FOR_TPLINK_WDR43X0_V1)
+#if defined(CONFIG_FOR_ENGENIUS_ENS202EXT)
+
+       #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:04 "\
+                               "rootfstype=squashfs init=/etc/preinit "\
+                               "mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom),1536k(kernel),12096k(rootfs),2048k(failsafe),64k(art)ro"
+
+#elif defined(CONFIG_FOR_TPLINK_WDR3500_V1) ||\
+      defined(CONFIG_FOR_TPLINK_WDR3600_V1) ||\
+      defined(CONFIG_FOR_TPLINK_WDR43X0_V1)
 
        #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
                                "rootfstype=squashfs init=/sbin/init "\
  * Load address and boot command
  * =============================
  */
-#if defined(CONFIG_FOR_YUNCORE_CPE870)
+#if defined(CONFIG_FOR_ENGENIUS_ENS202EXT)
+       #define CFG_LOAD_ADDR           0x9F0A0000
+#elif defined(CONFIG_FOR_YUNCORE_CPE870)
        #define CFG_LOAD_ADDR           0x9F680000
 #else
        #define CFG_LOAD_ADDR           0x9F020000
  * Environment configuration
  * =========================
  */
-#if defined(CONFIG_FOR_YUNCORE_CPE870)
+#if defined(CONFIG_FOR_ENGENIUS_ENS202EXT)
+       #define CFG_ENV_ADDR            0x9F040000
+       #define CFG_ENV_SIZE            0x10000
+       #define CFG_ENV_SECT_SIZE       0x10000
+#elif defined(CONFIG_FOR_YUNCORE_CPE870)
        #define CFG_ENV_ADDR            0x9F020000
        #define CFG_ENV_SIZE            0xFC00
        #define CFG_ENV_SECT_SIZE       0x10000
 #endif
 
 /* Firmware size limit */
-#if defined(CONFIG_FOR_YUNCORE_CPE870)
+#if defined(CONFIG_FOR_ENGENIUS_ENS202EXT)
+       #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (2752 * 1024)
+#elif defined(CONFIG_FOR_YUNCORE_CPE870)
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (256 * 1024)
 #else
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
  * For upgrade scripts in environment
  * ==================================
  */
-#if !defined(CONFIG_FOR_YUNCORE_CPE870)
+#if !defined(CONFIG_FOR_ENGENIUS_ENS202EXT)
+    !defined(CONFIG_FOR_YUNCORE_CPE870)
        #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 #endif