riscv: Rename cpu/qemu to cpu/generic

The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.

This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errata workarounds
required in cpu/generic then those can be done at runtime
in cpu/generic based on CPU vendor specific DT compatible
string.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c45e4d73a8ccbda296fdeff4aa583c42f650e1e8..6879047ff7b592692d9306296cbb0c8d18d2b910 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -22,7 +22,7 @@ source "board/emulation/qemu-riscv/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
-source "arch/riscv/cpu/qemu/Kconfig"
+source "arch/riscv/cpu/generic/Kconfig"
 
 # architecture-specific options below
 

diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig
new file mode 100644 (file)
index 0000000..1d6ab50
--- /dev/null
+++ b/arch/riscv/cpu/generic/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+
+config GENERIC_RISCV
+       bool
+       select ARCH_EARLY_INIT_R
+       imply CPU
+       imply CPU_RISCV
+       imply RISCV_TIMER
+       imply SIFIVE_CLINT if RISCV_MMODE
+       imply CMD_CPU

diff --git a/arch/riscv/cpu/generic/Makefile b/arch/riscv/cpu/generic/Makefile
new file mode 100644 (file)
index 0000000..258e462
--- /dev/null
+++ b/arch/riscv/cpu/generic/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+
+obj-y += dram.o
+obj-y += cpu.o

diff --git a/arch/riscv/cpu/generic/cpu.c b/arch/riscv/cpu/generic/cpu.c
new file mode 100644 (file)
index 0000000..ad2950c
--- /dev/null
+++ b/arch/riscv/cpu/generic/cpu.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+
+/*
+ * cleanup_before_linux() is called just before we call linux
+ * it prepares the processor for linux
+ *
+ * we disable interrupt and caches.
+ */
+int cleanup_before_linux(void)
+{
+       disable_interrupts();
+
+       cache_flush();
+
+       return 0;
+}
+
+/* To enumerate devices on the /soc/ node, create a "simple-bus" driver */
+static const struct udevice_id riscv_virtio_soc_ids[] = {
+       { .compatible = "riscv-virtio-soc" },
+       { }
+};
+
+U_BOOT_DRIVER(riscv_virtio_soc) = {
+       .name = "riscv_virtio_soc",
+       .id = UCLASS_SIMPLE_BUS,
+       .of_match = riscv_virtio_soc_ids,
+       .flags = DM_FLAG_PRE_RELOC,
+};

diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c
new file mode 100644 (file)
index 0000000..84d87d2
--- /dev/null
+++ b/arch/riscv/cpu/generic/dram.c
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+
+int dram_init(void)
+{
+       return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+       return fdtdec_setup_memory_banksize();
+}

diff --git a/arch/riscv/cpu/qemu/Kconfig b/arch/riscv/cpu/qemu/Kconfig
deleted file mode 100644 (file)
index f48751e..0000000
--- a/arch/riscv/cpu/qemu/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
-
-config QEMU_RISCV
-       bool
-       select ARCH_EARLY_INIT_R
-       imply CPU
-       imply CPU_RISCV
-       imply RISCV_TIMER
-       imply SIFIVE_CLINT if RISCV_MMODE
-       imply CMD_CPU

diff --git a/arch/riscv/cpu/qemu/Makefile b/arch/riscv/cpu/qemu/Makefile
deleted file mode 100644 (file)
index 258e462..0000000
--- a/arch/riscv/cpu/qemu/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
-
-obj-y += dram.o
-obj-y += cpu.o

diff --git a/arch/riscv/cpu/qemu/cpu.c b/arch/riscv/cpu/qemu/cpu.c
deleted file mode 100644 (file)
index ad2950c..0000000
--- a/arch/riscv/cpu/qemu/cpu.c
+++ /dev/null
@@ -1,35 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
- */
-
-#include <common.h>
-#include <dm.h>
-
-/*
- * cleanup_before_linux() is called just before we call linux
- * it prepares the processor for linux
- *
- * we disable interrupt and caches.
- */
-int cleanup_before_linux(void)
-{
-       disable_interrupts();
-
-       cache_flush();
-
-       return 0;
-}
-
-/* To enumerate devices on the /soc/ node, create a "simple-bus" driver */
-static const struct udevice_id riscv_virtio_soc_ids[] = {
-       { .compatible = "riscv-virtio-soc" },
-       { }
-};
-
-U_BOOT_DRIVER(riscv_virtio_soc) = {
-       .name = "riscv_virtio_soc",
-       .id = UCLASS_SIMPLE_BUS,
-       .of_match = riscv_virtio_soc_ids,
-       .flags = DM_FLAG_PRE_RELOC,
-};

diff --git a/arch/riscv/cpu/qemu/dram.c b/arch/riscv/cpu/qemu/dram.c
deleted file mode 100644 (file)
index 84d87d2..0000000
--- a/arch/riscv/cpu/qemu/dram.c
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
- */
-
-#include <common.h>
-#include <fdtdec.h>
-
-int dram_init(void)
-{
-       return fdtdec_setup_mem_size_base();
-}
-
-int dram_init_banksize(void)
-{
-       return fdtdec_setup_memory_banksize();
-}

diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index 0d865acf100704f87b6245c54d5f02a8cf98add0..88d07d568e7f602298d972fdd26787330519fa41 100644 (file)
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -7,7 +7,7 @@ config SYS_VENDOR
        default "emulation"
 
 config SYS_CPU
-       default "qemu"
+       default "generic"
 
 config SYS_CONFIG_NAME
        default "qemu-riscv"
@@ -18,7 +18,7 @@ config SYS_TEXT_BASE
 
 config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
-       select QEMU_RISCV
+       select GENERIC_RISCV
        imply SYS_NS16550
        imply VIRTIO_MMIO
        imply VIRTIO_NET