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rockchip: dts: rv1108: Add SARADC node at dtsi level
author
David Wu
<david.wu@rock-chips.com>
Wed, 20 Sep 2017 06:40:11 +0000
(14:40 +0800)
committer
Philipp Tomsich
<philipp.tomsich@theobroma-systems.com>
Sat, 30 Sep 2017 22:33:30 +0000
(
00:33
+0200)
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
arch/arm/dts/rv1108.dtsi
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diff --git
a/arch/arm/dts/rv1108.dtsi
b/arch/arm/dts/rv1108.dtsi
index 3153dfe6584a17bf34f308fea3b2c492f1485d57..31b4d93b0763d49b16a82e235c73c252aa736da6 100644
(file)
--- a/
arch/arm/dts/rv1108.dtsi
+++ b/
arch/arm/dts/rv1108.dtsi
@@
-126,6
+126,17
@@
reg = <0x10300000 0x1000>;
};
+ saradc: saradc@1038c000 {
+ compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
+ reg = <0x1038c000 0x100>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #io-channel-cells = <1>;
+ clock-frequency = <1000000>;
+ clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+ clock-names = "saradc", "apb_pclk";
+ status = "disabled";
+ };
+
pmugrf: syscon@20060000 {
compatible = "rockchip,rv1108-pmugrf", "syscon";
reg = <0x20060000 0x1000>;