+commit f1152f8c28db4a22087c21c618a3f7baa48e9a4f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jul 6 02:50:19 2007 +0200
+
+ Code cleanup and default config update for STC GP3 SSA board.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b44896215a09c60fa40cae906f7ed207bbc2c492
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Thu Jul 5 08:17:37 2007 +0200
+
+ Merged POST framework with the current TOT.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit f780b83316d9af1f61d71cc88b1917b387b9b995
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Wed Jun 27 18:11:38 2007 +0200
+
+ resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
+
+commit 04e6c38b766eaa2f3287561563c9e215e0c3a0d4
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jul 4 10:06:30 2007 +0200
+
+ ppc4xx: Update lwmon5 board
+
+ - Add optional ECC generation routine to preserve existing
+ RAM values. This is needed for the Linux log-buffer support
+ - Add optional DDR2 setup with CL=4
+ - GPIO50 not used anymore
+ - Lime register setup added
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1f2a05898658900dc5717761e27abf2052e67e13
+Author: Mushtaq Khan <mushtaqk_921@yahoo.co.in>
+Date: Sat Jun 30 18:50:48 2007 +0200
+
+ Fix S-ATA support.
+
+ Signed-off-by: mushtaq khan <mushtaqk_921@yahoo.co.in>
+
+commit a5d71e290f3673269be8eefb4ec44f53412f9461
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Mon Jun 25 19:11:37 2007 +0200
+
+ [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit a1bd6200eccd3a02040a955d5f43d3ee1fc9f93b
+Author: Niklaus Giger <niklaus.giger@nestal.com>
+Date: Mon Jun 25 17:03:13 2007 +0200
+
+ ppc4xx: PPC440EPx Emit DDR0 registers on machine check interrupt
+
+ This patch prints the DDR status registers upon machine check
+ interrupt on the 440EPx/GRx. This can be useful especially when
+ ECC support is enabled.
+
+ I added some small changes to the original patch from Niklaus to
+ make it compile clean.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 807018fb7faceb429ce0cb47baa2073746b33a4e
+Author: Niklaus Giger <niklaus.giger@nestal.com>
+Date: Mon Jun 25 16:50:55 2007 +0200
+
+ ppc4xx: Fix O=buildir builds
+
+ This patch fixes the problem to assemble cpu/ppc4xx/start.S
+ experienced last week where building failed having specified
+ O=../build.sequoia.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
+
+commit 466fff1a7bb5fe764a06450626f6098219f446b8
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 25 15:57:39 2007 +0200
+
+ ppc4xx: Add pci_pre_init() for 405 boards
+
+ This patch removes the CFG_PCI_PRE_INIT option completely, since
+ it's not needed anymore with the patch from Matthias Fuchs with
+ the "weak" pci_pre_init() implementation.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6f35c53166213c24a5a0e2390ed861136ff73870
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Sun Jun 24 17:41:21 2007 +0200
+
+ ppc4xx: Maintenance patch for esd's CPCI405 derivats
+
+ -add pci_pre_init() for pci interrupt fixup code
+ -disable phy sleep mode via reset_phy() function
+ -use correct io accessors
+ -cleanup
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 5a1c9ff0c44305b57cb4d8f9369bba90bcf0e1f8
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Sun Jun 24 17:23:41 2007 +0200
+
+ ppc4xx: Add pci_pre_init() for 405 boards
+
+ This patch adds support for calling a plattform dependant
+ pci_pre_init() function for 405 boards. This can be used to
+ move the current pci_405gp_fixup_irq() function into the
+ board code.
+
+ This patch also makes the CFG_PCI_PRE_INIT define obsolete.
+ A default function with 'weak' attribute is used when
+ a board specific pci_pre_init() is not implemented.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 1636d1c8529c006d106287cfbc20cd0a246fe1cb
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jun 22 23:59:00 2007 +0200
+
+ Coding stylke cleanup; rebuild CHANGELOG
+
commit 2dc64451b4c08ffd619372abfdc2506a2e2363b9
Author: Igor Lisitsin <igor@emcraft.com>
Date: Wed Apr 18 14:55:19 2007 +0400
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
+commit 566a494f592ae3b3c0785d90d4e1ba45574880c4
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jun 22 19:11:54 2007 +0200
+
+ [PCS440EP] upgrade the PCS440EP board:
+ - Show on the Status LEDs, some States of the board.
+ - Get the MAC addresses from the EEProm
+ - use PREBOOT
+ - use the CF on the board.
+ - check the U-Boot image in the Flash with a SHA1
+ checksum.
+ - use dynamic TLB entries generation for the SDRAM
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 3a1f5c81b0b9557817a789bece839905581c2205
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 22 16:58:40 2007 +0200
+
+ ppc4xx: Fix problem with extended program_tlb() funtion
+
+ The recently extended program_tlb() function had a problem when
+ multiple TLB's had to be setup (for example with 512MB of SDRAM). The
+ virtual address was not incremented. This patch fixes this issue
+ and is tested on Katmai with 512MB SDRAM.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Fri Jun 22 14:58:04 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 822d55365bb557e084d0e33625a6dedcc866110b
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed May 23 14:09:46 2007 -0500
+
+ Add LIST_86xx MAKEALL target for PowerPC builds.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
commit 9f0077abd69f7a7c756a915b961037302be3e6f2
Author: Stefan Roese <sr@denx.de>
Date: Tue May 22 12:48:09 2007 +0200
Makefile permissions
+commit 255a3577c848706441daee0174543efe205a77f8
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed May 16 16:52:19 2007 -0500
+
+ Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
+
+ For all practical u-boot purposes, TSECs don't differ throughout the
+ mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
commit 70124c2602ae2d4c5d3dba05b482d91548242de8
Author: Stefano Babic <sbabic@denx.de>
Date: Wed May 16 14:49:12 2007 +0200
Coding Style Cleanup, new CHANGELOG
+commit 3162eb836903c8b247fdc7470dd39bfa6996f495
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue May 15 23:38:05 2007 +0200
+
+ Minor coding style cleanup.
+
+commit 66d9dbec1cc27d6398ee6cf84639dbe14971251e
+Author: mushtaq khan <mushtaq_k@procsys.com>
+Date: Fri Apr 20 14:23:02 2007 +0530
+
+ Add driver for S-ATA-controller on Intel processors with South
+ Bridge, ICH-5, ICH-6 and ICH-7.
+
+ Implementation:
+
+ 1. Code is divided in to two files. All functions, which are
+ controller specific are kept in "drivers/ata_piix.c" file and
+ functions, which are not controller specific, are kept in
+ "common/cmd_sata.c" file.
+
+ 2. Reading and Writing from the S-ATA drive is done using PIO method.
+
+ 3. Driver can be configured for 48-bit addressing by defining macro
+ CONFIG_LBA48, if this macro is not defined driver uses the 28-bit
+ addressing.
+
+ 4. S-ATA read function is hooked to the File system, commands like
+ ext2ls and ext2load file can be used. This has been tested.
+
+ 5. U-Boot command "SATA_init" is added, which initializes the S-ATA
+ controller and identifies the S-ATA drives connected to it.
+
+ 6. U-Boot command "sata" is added, which is used to read/write, print
+ partition table and get info about the drives present. This I have
+ implemented in same way as "ide" command is implemented in U-Boot.
+
+ 7. This driver is for S-ATA in native mode.
+
+ 8. This driver does not support the Native command queuing and
+ Hot-plugging.
+
+ Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
+
+commit 644e6fb4eb8be90ea04ba34b643a8bf019d680e0
+Author: mushtaq khan <mushtaq_k@procsys.com>
+Date: Mon Apr 30 15:57:22 2007 +0530
+
+ Fixes bug clearing the bss section for i386
+
+ Hi,
+ There is a bug in the code of clearing the bss section for processor
+ i386.(File: cpu/i386/start.S)
+ In the code, bss_start addr (starting addr of bss section) is put into
+ the register %eax, but the code which clears the bss section refers to
+ the addr pointed by %edi.
+
+ This patch fixes this bug by putting bss_start into %edi register.
+
+ Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
+
+commit c3243cf7b490057277d61acffe4ad0946f9eb4a4
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Mon Apr 30 16:47:28 2007 -0500
+
+ Add support for BCM5464 Quad Phy
+
+ Added support for Broadcom's BCM5464 Quad Phy
+
+ Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+
+commit 1b305bdc754c8468e1d5d858f5dcf8a7a0a4bb7a
+Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
+Date: Wed May 9 08:10:57 2007 +0800
+
+ Search the exception table with linear algorithm
+
+ Search the exception table with linear algorithm instead of
+ bisecting algorithm.
+ Because the exception table might be unsorted.
+
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 5dfaa50eb819686bfba1927e8c5b8a70a4d65fd3
+Author: Aubrey.Li <aubrey.adi@gmail.com>
+Date: Mon May 14 11:47:35 2007 +0800
+
+ Fix compilation issues on MACOSX
+
+ Singed-off-by: Marc Hoffman <Marc.Hoffman@analog.com>
+ Signed-off-by: Aubrey Li <aubrey.adi@gmail.com>
+
+commit 56fd7162985c412317bbf763a225fba23c64fd31
+Author: Stephen Williams <steve@icarus.com>
+Date: Tue May 15 07:55:42 2007 -0700
+
+ Fix for compile of JSE target
+
+ The attached patch fixes the compile of the JSE board in the
+ denx git as of 14 may 2007. It is an extremely simple patch,
+ it just adds the missing define of CFG_SYSTEMACE_WIDTH.
+
+ Fix to compile JSE against 20070514 git of u-boot
+
commit 61936667e86a250ae12fd2dc189d3588f0a59e0b
Author: Stefan Roese <sr@denx.de>
Date: Fri May 11 12:01:49 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 2f550ab976405300f5b07bf2890800840d0aa05f
+Author: Timur Tabi <timur@freescale.com>
+Date: Sat May 5 08:12:30 2007 +0200
+
+ 5xxx: write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, ftp_cpu_setup()
+ should write the MAC address to mac-address and local-mac-address, if they
+ exist.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
commit a79886590593ba1d667c840caa4940c61639f18f
Author: Thomas Knobloch <knobloch@siemens.com>
Date: Sat May 5 07:04:42 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 864aa6a6a466fcb92bf32b1d7dba79cd709b52c9
+Author: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+Date: Sun Apr 29 14:01:54 2007 +0200
+
+ [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
+
+ MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
+ message. Use PVR to distinguish between the two variants, and print proper CPU
+ information.
+
+ Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
commit 5c5d3242935cf3543af01142627494434834cf98
Author: Kim Phillips <kim.phillips@freescale.com>
Date: Wed Apr 25 12:34:38 2007 -0500
mpc83xx: minor fixups for 8313rdb introduction
+commit ada4d40091f6ed4a4f0040e08d20db21967e4a67
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Wed Apr 25 16:01:26 2007 +0200
+
+ [PATCH] simplify silent console
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Acked-by: Stefan Roese <sr@denx.de>
+
commit 144876a380f5756f57412caf74c1d6dc201dd796
Author: Michal Simek <monstr@monstr.eu>
Date: Tue Apr 24 23:01:02 2007 +0200
Signed-off-by: Scott Wood <scottwood@freescale.com>
+commit 7fc4c71a143be8666d70803fb25ae60379c95622
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Apr 23 15:39:59 2007 +0200
+
+ Fix file mode
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 38257988abfe74d459ca2ad748b109ca04e4efe1
+Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+Date: Mon Apr 23 15:30:39 2007 +0200
+
+ [PATCH] Avoid assigning PCI resources from zero address
+
+ If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
+ core complains and IDE drivers fails to work. Also, assigning zero to a BAR
+ was illegal according to PCI 2.1 (the later revisions seem to have excluded the
+ sentence about "0" being considered an invalid address) -- so, use a reasonable
+ starting value of 0x1000 (that's what the most Linux archs are using).
+
+ Alternatively, one might have fixed the calls to pci_set_region() individually
+ (some code even seems to have taken care of this issue) but that would have
+ been a lot more work. :-)
+
+ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit afb903a2eb9436baa9270ccc0c27082d86497d89
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Mon Apr 23 14:00:11 2007 +0200
+
+ [patch] setenv(...) can delete environmentalvariables
+
+ update setenv() function so that entering a NULL value for the
+ variable's value will delete the environmental variable
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 36f104e5caa747d568eff26b369565af57c2ffa6
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Apr 23 13:54:24 2007 +0200
+
+ [patch] use unsigned char in smc91111 driver for mac
+
+ the v_mac variable in the smc91111 driver is declared as a signed char ...
+ this causes problems when one of the bytes in the MAC is "signed" like 0xE0
+ because when it gets printed out, you get a display like:
+ 0xFFFFFFE0 and that's no good
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
commit 323bfa8f436dc3bc57187c9b1488bc3146ff1522
Author: Stefan Roese <sr@denx.de>
Date: Mon Apr 23 12:00:22 2007 +0200
#########################################################################
#########################################################################
-ALL = $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND)
+ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND)
all: $(ALL)
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
-d $< $@
+$(obj)u-boot.sha1: $(obj)u-boot.bin
+ $(obj)./tools/ubsha1 $(obj)u-boot.bin
+
$(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $< > $@
$(obj)examples/smc91111_eeprom $(obj)examples/interrupt \
$(obj)examples/test_burst
rm -f $(obj)tools/img2srec $(obj)tools/mkimage $(obj)tools/envcrc \
- $(obj)tools/gen_eth_addr
+ $(obj)tools/gen_eth_addr $(obj)tools/ubsha1
rm -f $(obj)tools/mpc86x_clk $(obj)tools/ncb
rm -f $(obj)tools/easylogo/easylogo $(obj)tools/bmp_logo
rm -f $(obj)tools/gdb/astest $(obj)tools/gdb/gdbcont $(obj)tools/gdb/gdbsend
rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS $(obj)include/version_autogenerated.h
rm -fr $(obj)*.*~
rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
- rm -f $(obj)tools/crc32.c $(obj)tools/environment.c $(obj)tools/env/crc32.c
+ rm -f $(obj)tools/crc32.c $(obj)tools/environment.c $(obj)tools/env/crc32.c $(obj)tools/sha1.c
rm -f $(obj)tools/inca-swap-bytes $(obj)cpu/mpc824x/bedbug_603e.c
rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
[ ! -d $(OBJTREE)/nand_spl ] || find $(obj)nand_spl -lname "*" -print | xargs rm -f
-31 post/post.c POST test failed, detected by post_output_backlog()
-32 post/post.c POST test failed, detected by post_run_single()
- -1 common/cmd_doc.c Bad usage of "doc" command
- -1 common/cmd_doc.c No boot device
- -1 common/cmd_doc.c Unknown Chip ID on boot device
- -1 common/cmd_doc.c Read Error on boot device
- -1 common/cmd_doc.c Image header has bad magic number
-
- -1 common/cmd_ide.c Bad usage of "ide" command
- -1 common/cmd_ide.c No boot device
- -1 common/cmd_ide.c Unknown boot device
- -1 common/cmd_ide.c Unknown partition table
- -1 common/cmd_ide.c Invalid partition type
- -1 common/cmd_ide.c Read Error on boot device
- -1 common/cmd_ide.c Image header has bad magic number
-
- -1 common/cmd_nand.c Bad usage of "nand" command
- -1 common/cmd_nand.c No boot device
- -1 common/cmd_nand.c Unknown Chip ID on boot device
- -1 common/cmd_nand.c Read Error on boot device
- -1 common/cmd_nand.c Image header has bad magic number
-
- -1 common/env_common.c Environment has a bad CRC, using default
-
+ 34 common/cmd_doc.c before loading a Image from a DOC device
+ -35 common/cmd_doc.c Bad usage of "doc" command
+ 35 common/cmd_doc.c correct usage of "doc" command
+ -36 common/cmd_doc.c No boot device
+ 36 common/cmd_doc.c correct boot device
+ -37 common/cmd_doc.c Unknown Chip ID on boot device
+ 37 common/cmd_doc.c correct chip ID found, device available
+ -38 common/cmd_doc.c Read Error on boot device
+ 38 common/cmd_doc.c reading Image header from DOC device OK
+ -39 common/cmd_doc.c Image header has bad magic number
+ 39 common/cmd_doc.c Image header has correct magic number
+ -40 common/cmd_doc.c Error reading Image from DOC device
+ 40 common/cmd_doc.c Image header has correct magic number
+ 41 common/cmd_ide.c before loading a Image from a IDE device
+ -42 common/cmd_ide.c Bad usage of "ide" command
+ 42 common/cmd_ide.c correct usage of "ide" command
+ -43 common/cmd_ide.c No boot device
+ 43 common/cmd_ide.c boot device found
+ -44 common/cmd_ide.c Device not available
+ 44 common/cmd_ide.c Device available
+ -45 common/cmd_ide.c wrong partition selected
+ 45 common/cmd_ide.c partition selected
+ -46 common/cmd_ide.c Unknown partition table
+ 46 common/cmd_ide.c valid partition table found
+ -47 common/cmd_ide.c Invalid partition type
+ 47 common/cmd_ide.c correct partition type
+ -48 common/cmd_ide.c Error reading Image Header on boot device
+ 48 common/cmd_ide.c reading Image Header from IDE device OK
+ -49 common/cmd_ide.c Image header has bad magic number
+ 49 common/cmd_ide.c Image header has correct magic number
+ -50 common/cmd_ide.c Image header has bad checksum
+ 50 common/cmd_ide.c Image header has correct checksum
+ -51 common/cmd_ide.c Error reading Image from IDE device
+ 51 common/cmd_ide.c reading Image from IDE device OK
+ 52 common/cmd_nand.c before loading a Image from a NAND device
+ -53 common/cmd_nand.c Bad usage of "nand" command
+ 53 common/cmd_nand.c correct usage of "nand" command
+ -54 common/cmd_nand.c No boot device
+ 54 common/cmd_nand.c boot device found
+ -55 common/cmd_nand.c Unknown Chip ID on boot device
+ 55 common/cmd_nand.c correct chip ID found, device available
+ -56 common/cmd_nand.c Error reading Image Header on boot device
+ 56 common/cmd_nand.c reading Image Header from NAND device OK
+ -57 common/cmd_nand.c Image header has bad magic number
+ 57 common/cmd_nand.c Image header has correct magic number
+ -58 common/cmd_nand.c Error reading Image from NAND device
+ 58 common/cmd_nand.c reading Image from NAND device OK
+
+ -60 common/env_common.c Environment has a bad CRC, using default
+
+ 64 net/eth.c starting with Ethernetconfiguration.
+ -64 net/eth.c no Ethernet found.
+ 65 net/eth.c Ethernet found.
+
+ -80 common/cmd_net.c usage wrong
+ 80 common/cmd_net.c before calling NetLoop()
+ -81 common/cmd_net.c some error in NetLoop() occured
+ 81 common/cmd_net.c NetLoop() back without error
+ -82 common/cmd_net.c size == 0 (File with size 0 loaded)
+ 82 common/cmd_net.c trying automatic boot
+ 83 common/cmd_net.c running autoscript
+ -83 common/cmd_net.c some error in automatic boot or autoscript
+ 84 common/cmd_net.c end without errors
Modem Support:
--------------
DECLARE_GLOBAL_DATA_PTR;
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
#if 0
#define FPGA_DEBUG
#endif
* include common fpga code (for esd boards)
*/
#include "../common/fpga.c"
-
-
#include "../common/auto_update.h"
#ifdef CONFIG_CPCI405AB
int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
-
/* Prototypes */
int cpci405_version(void);
int gunzip(void *, int, unsigned char *, unsigned long *);
void lxt971_no_sleep(void);
-
int board_early_init_f (void)
{
#ifndef CONFIG_CPCI405_VER2
/*
* First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
*/
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
+ out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
+ out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */
- out32(GPIO0_OR, 0); /* pull prg low */
+ out32(GPIO0_OR, 0); /* pull prg low */
/*
* Boot onboard FPGA
* IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(uicer, 0x00000000); /* disable all ints */
+ mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
#ifdef CONFIG_CPCI405_6U
if (cpci405_version() == 3) {
- mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
+ mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
} else {
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
+ mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
}
#else
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
+ mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
#endif
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(uictr, 0x10000000); /* set int trigger levels */
+ mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
return 0;
}
-
/* ------------------------------------------------------------------------- */
int ctermm2(void)
{
#ifdef CONFIG_CPCI405_VER2
- return 0; /* no, board is cpci405 */
+ return 0; /* no, board is cpci405 */
#else
if ((*(unsigned char *)0xf0000400 == 0x00) &&
(*(unsigned char *)0xf0000401 == 0x01))
- return 0; /* no, board is cpci405 */
+ return 0; /* no, board is cpci405 */
else
- return -1; /* yes, board is cterm-m2 */
+ return -1; /* yes, board is cterm-m2 */
#endif
}
-
int cpci405_host(void)
{
if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
- return -1; /* yes, board is cpci405 host */
+ return -1; /* yes, board is cpci405 host */
else
- return 0; /* no, board is cpci405 adapter */
+ return 0; /* no, board is cpci405 adapter */
}
-
int cpci405_version(void)
{
unsigned long cntrl0Reg;
mtdcr(cntrl0, cntrl0Reg | 0x03000000);
out_be32((void*)GPIO0_ODR, in_be32((void*)GPIO0_ODR) & ~0x00180000);
out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) & ~0x00180000);
- udelay(1000); /* wait some time before reading input */
- value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */
+ udelay(1000); /* wait some time before reading input */
+ value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */
/*
* Restore GPIO settings
}
}
-
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
-
int misc_init_r (void)
{
unsigned long cntrl0Reg;
return (0);
}
-
/*
* Check Board Identity:
*/
}
#ifndef CONFIG_CPCI405_VER2
- puts ("\nFPGA: ");
+ puts ("\nFPGA: ");
/* display infos on fpgaimage */
index = 15;
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
-
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
#endif
}
-
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CPCI405_VER2
#endif /* CONFIG_IDE_RESET */
#endif /* CONFIG_CPCI405_VER2 */
-
#if defined(CONFIG_PCI)
void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
#endif /* defined(CONFIG_PCI) */
-
#ifdef CONFIG_CPCI405AB
-#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
+#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
|= CFG_FPGA_MODE_1WIRE_DIR)
-#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
+#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
&= ~CFG_FPGA_MODE_1WIRE_DIR)
-#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
+#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
& CFG_FPGA_MODE_1WIRE)
/*
return result;
}
-
/*
* Send 1 a 1-wire write bit.
* Provide 10us recovery time.
}
}
-
/*
* Read a bit from the 1-wire bus and return it.
* Provide 10us recovery time.
return result;
}
-
void OWWriteByte(int data)
{
int loop;
}
}
-
int OWReadByte(void)
{
int loop, result = 0;
return result;
}
-
int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
volatile unsigned short val;
NULL
);
-
#define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */
#define CFG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ if (status < -32) status = -1; /* let things compatible */
status ^= 0x0F;
status = (status & 0x0F) << 14;
immr->im_cpm.cp_pbdat = (immr->im_cpm.cp_pbdat & ~PB_LED_ALL) | status;
void show_boot_progress (int status)
{
+ if (status < -32) status = -1; /* let things compatible */
/*
switch(status) {
case 1: logodl_set_led(0,1); break;
# PCS440EP board
#
+# Check the U-Boot Image with a SHA1 checksum
+ALL += $(obj)u-boot.sha1
+
#TEXT_BASE = 0x00001000
ifeq ($(ramsym),1)
case FLASH_MAN_AMD: printf ("AMD "); break;
case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
case FLASH_MAN_SST: printf ("SST "); break;
+ case FLASH_MAN_STM: printf ("ST Micro"); break;
case FLASH_MAN_EXCEL: printf ("Excel Semiconductor "); break;
+ case FLASH_MAN_MX: printf ("MXIC "); break;
default: printf ("Unknown Vendor "); break;
}
break;
case FLASH_SST040: printf ("SST39LF/VF040 (4 Mbit, uniform sector size)\n");
break;
+ case STM_ID_M29W040B: printf ("ST Micro M29W040B (4 Mbit, uniform sector size)\n");
+ break;
default: printf ("Unknown Chip Type\n");
break;
}
case (CFG_FLASH_WORD_SIZE)SST_MANUFACT:
info->flash_id = FLASH_MAN_SST;
break;
+ case (CFG_FLASH_WORD_SIZE)STM_MANUFACT:
+ info->flash_id = FLASH_MAN_STM;
+ break;
case (CFG_FLASH_WORD_SIZE)EXCEL_MANUFACT:
info->flash_id = FLASH_MAN_EXCEL;
break;
+ case (CFG_FLASH_WORD_SIZE)MX_MANUFACT:
+ info->flash_id = FLASH_MAN_MX;
+ break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->sector_count = 8;
info->size = 0x0080000; /* => 0.5 MB */
break;
+ case (CFG_FLASH_WORD_SIZE)STM_ID_M29W040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 0,5 MB */
+ break;
case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800T:
info->flash_id += FLASH_AM800T;
.globl tlbtab
tlbtab:
- tlbtab_start
+ tlbtab_start
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
- tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
+ /*
+ * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
+ tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
+ /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+ tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
- tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
+ /*
+ * TLB entries for SDRAM are not needed on this platform.
+ * They are dynamically generated in the SPD DDR detection
+ * routine.
+ */
- /* PCI */
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
- /* USB 2.0 Device */
- tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
+ /* PCI */
+ tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
+ /* USB 2.0 Device */
+ tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
+
+ tlbtab_end
#include <common.h>
#include <ppc4xx.h>
+#include <malloc.h>
+#include <command.h>
+#include <crc.h>
#include <asm/processor.h>
#include <spd_sdram.h>
+#include <status_led.h>
+#include <sha1.h>
DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-static void set_leds(int val)
+unsigned char sha1_checksum[SHA1_SUM_LEN];
+
+/* swap 4 Bits (Bit0 = Bit3, Bit1 = Bit2, Bit2 = Bit1 and Bit3 = Bit0) */
+unsigned char swapbits[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
+ 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
+
+static void set_leds (int val)
+{
+ out32(GPIO0_OR, (in32 (GPIO0_OR) & ~0x78000000) | (val << 27));
+}
+
+#define GET_LEDS ((in32 (GPIO0_OR) & 0x78000000) >> 27)
+
+void __led_init (led_id_t mask, int state)
+{
+ int val = GET_LEDS;
+
+ if (state == STATUS_LED_ON)
+ val |= mask;
+ else
+ val &= ~mask;
+ set_leds (val);
+}
+
+void __led_set (led_id_t mask, int state)
+{
+ int val = GET_LEDS;
+
+ if (state == STATUS_LED_ON)
+ val |= mask;
+ else if (state == STATUS_LED_OFF)
+ val &= ~mask;
+ set_leds (val);
+}
+
+void __led_toggle (led_id_t mask)
{
- unsigned char led[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
- 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
- out32(GPIO0_OR, (in32(GPIO0_OR) & ~0x78000000) | (led[val] << 27));
+ int val = GET_LEDS;
+
+ val ^= mask;
+ set_leds (val);
}
+static void status_led_blink (void)
+{
+ int i;
+ int val = GET_LEDS;
+
+ /* set all LED which are on, to state BLINKING */
+ for (i = 0; i < 4; i++) {
+ if (val & 0x01) status_led_set (3 - i, STATUS_LED_BLINKING);
+ else status_led_set (3 - i, STATUS_LED_OFF);
+ val = val >> 1;
+ }
+}
+
+#if defined(CONFIG_SHOW_BOOT_PROGRESS)
+void show_boot_progress (int val)
+{
+ /* find all valid Codes for val in README */
+ if (val == -30) return;
+ if (val < 0) {
+ /* smthing goes wrong */
+ status_led_blink ();
+ return;
+ }
+ switch (val) {
+ case 1:
+ /* validating Image */
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_ON);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+ case 15:
+ /* booting */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_ON);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+#if 0
+ case 64:
+ /* starting Ethernet configuration */
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_OFF);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+#endif
+ case 80:
+ /* loading Image */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_OFF);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+ }
+}
+#endif
+
int board_early_init_f(void)
{
register uint reg;
return 0;
}
+#define EEPROM_LEN 256
+void load_sernum_ethaddr (void)
+{
+ int ret;
+ char buf[EEPROM_LEN];
+ char mac[32];
+ char *use_eeprom;
+ u16 checksumcrc16 = 0;
+
+ /* read the MACs from EEprom */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_ON);
+ ret = eeprom_read (CFG_I2C_EEPROM_ADDR, 0, (uchar *)buf, EEPROM_LEN);
+ if (ret == 0) {
+ checksumcrc16 = cyg_crc16 ((uchar *)buf, EEPROM_LEN - 2);
+ /* check, if the EEprom is programmed:
+ * - The Prefix(Byte 0,1,2) is equal to "ATR"
+ * - The checksum, stored in the last 2 Bytes, is correct
+ */
+ if ((strncmp (buf,"ATR",3) != 0) ||
+ ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
+ ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
+ /* EEprom is not programmed */
+ printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
+ } else {
+ /* get the MACs */
+ sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
+ buf[3],
+ buf[4],
+ buf[5],
+ buf[6],
+ buf[7],
+ buf[8]);
+ setenv ("ethaddr", (char *) mac);
+ sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
+ buf[9],
+ buf[10],
+ buf[11],
+ buf[12],
+ buf[13],
+ buf[14]);
+ setenv ("eth1addr", (char *) mac);
+ return;
+ }
+ }
+
+ /* some error reading the EEprom */
+ if ((use_eeprom = getenv ("use_eeprom_ethaddr")) == NULL) {
+ /* dont use bootcmd */
+ setenv("bootdelay", "-1");
+ return;
+ }
+ /* == default ? use standard */
+ if (strncmp (use_eeprom, "default", 7) == 0) {
+ return;
+ }
+ /* Env doesnt exist -> hang */
+ status_led_blink ();
+ hang ();
+ return;
+}
+
+#ifdef CONFIG_PREBOOT
+
+static uchar kbd_magic_prefix[] = "key_magic";
+static uchar kbd_command_prefix[] = "key_cmd";
+
+struct kbd_data_t {
+ char s1;
+ char s2;
+};
+
+struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
+{
+ char *val;
+ unsigned long tmp;
+
+ /* use the DIPs for some bootoptions */
+ val = getenv (ENV_NAME_DIP);
+ tmp = simple_strtoul (val, NULL, 16);
+
+ kbd_data->s2 = (tmp & 0x0f);
+ kbd_data->s1 = (tmp & 0xf0) >> 4;
+ return kbd_data;
+}
+
+static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
+{
+ char s1 = str[0];
+
+ if (s1 >= '0' && s1 <= '9')
+ s1 -= '0';
+ else if (s1 >= 'a' && s1 <= 'f')
+ s1 = s1 - 'a' + 10;
+ else if (s1 >= 'A' && s1 <= 'F')
+ s1 = s1 - 'A' + 10;
+ else
+ return -1;
+
+ if (s1 != kbd_data->s1) return -1;
+
+ s1 = str[1];
+ if (s1 >= '0' && s1 <= '9')
+ s1 -= '0';
+ else if (s1 >= 'a' && s1 <= 'f')
+ s1 = s1 - 'a' + 10;
+ else if (s1 >= 'A' && s1 <= 'F')
+ s1 = s1 - 'A' + 10;
+ else
+ return -1;
+
+ if (s1 != kbd_data->s2) return -1;
+ return 0;
+}
+
+static char *key_match (const struct kbd_data_t *kbd_data)
+{
+ char magic[sizeof (kbd_magic_prefix) + 1];
+ char *suffix;
+ char *kbd_magic_keys;
+
+ /*
+ * The following string defines the characters that can be appended
+ * to "key_magic" to form the names of environment variables that
+ * hold "magic" key codes, i. e. such key codes that can cause
+ * pre-boot actions. If the string is empty (""), then only
+ * "key_magic" is checked (old behaviour); the string "125" causes
+ * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
+ */
+ if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
+ kbd_magic_keys = "";
+
+ /* loop over all magic keys;
+ * use '\0' suffix in case of empty string
+ */
+ for (suffix = kbd_magic_keys; *suffix ||
+ suffix == kbd_magic_keys; ++suffix) {
+ sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
+ if (compare_magic (kbd_data, getenv (magic)) == 0) {
+ char cmd_name[sizeof (kbd_command_prefix) + 1];
+ char *cmd;
+
+ sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
+ cmd = getenv (cmd_name);
+
+ return (cmd);
+ }
+ }
+ return (NULL);
+}
+
+#endif /* CONFIG_PREBOOT */
+
+static int pcs440ep_readinputs (void)
+{
+ int i;
+ char value[20];
+
+ /* read the inputs and set the Envvars */
+ /* Revision Level Bit 26 - 29 */
+ i = ((in32 (GPIO0_IR) & 0x0000003c) >> 2);
+ i = swapbits[i];
+ sprintf (value, "%02x", i);
+ setenv (ENV_NAME_REVLEV, value);
+ /* Solder Switch Bit 30 - 33 */
+ i = (in32 (GPIO0_IR) & 0x00000003) << 2;
+ i += (in32 (GPIO1_IR) & 0xc0000000) >> 30;
+ i = swapbits[i];
+ sprintf (value, "%02x", i);
+ setenv (ENV_NAME_SOLDER, value);
+ /* DIP Switch Bit 49 - 56 */
+ i = ((in32 (GPIO1_IR) & 0x00007f80) >> 7);
+ i = (swapbits[i & 0x0f] << 4) + swapbits[(i & 0xf0) >> 4];
+ sprintf (value, "%02x", i);
+ setenv (ENV_NAME_DIP, value);
+ return 0;
+}
+
+
+#if defined(CONFIG_SHA1_CHECK_UB_IMG)
+/*************************************************************************
+ * calculate a SHA1 sum for the U-Boot image in Flash.
+ *
+ ************************************************************************/
+static int pcs440ep_sha1 (int docheck)
+{
+ unsigned char *data;
+ unsigned char *ptroff;
+ unsigned char output[20];
+ unsigned char org[20];
+ int i, len = CONFIG_SHA1_LEN;
+
+ memcpy ((char *)CFG_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
+ data = (unsigned char *)CFG_LOAD_ADDR;
+ ptroff = &data[len + SHA1_SUM_POS];
+
+ for (i = 0; i < SHA1_SUM_LEN; i++) {
+ org[i] = ptroff[i];
+ ptroff[i] = 0;
+ }
+
+ sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
+
+ if (docheck == 2) {
+ for (i = 0; i < 20 ; i++) {
+ printf("%02X ", output[i]);
+ }
+ printf("\n");
+ }
+ if (docheck == 1) {
+ for (i = 0; i < 20 ; i++) {
+ if (org[i] != output[i]) return 1;
+ }
+ }
+ return 0;
+}
+
+/*************************************************************************
+ * do some checks after the SHA1 checksum from the U-Boot Image was
+ * calculated.
+ *
+ ************************************************************************/
+static void pcs440ep_checksha1 (void)
+{
+ int ret;
+ char *cs_test;
+
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_OFF);
+ status_led_set (2, STATUS_LED_ON);
+ ret = pcs440ep_sha1 (1);
+ if (ret == 0) return;
+
+ if ((cs_test = getenv ("cs_test")) == NULL) {
+ /* Env doesnt exist -> hang */
+ status_led_blink ();
+ hang ();
+ }
+
+ if (strncmp (cs_test, "off", 3) == 0) {
+ printf ("SHA1 U-Boot sum NOT ok!\n");
+ setenv ("bootdelay", "-1");
+ }
+}
+#else
+static __inline__ void pcs440ep_checksha1 (void) { do {} while (0);}
+#endif
+
int misc_init_r (void)
{
uint pbcr;
CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
&flash_info[1]);
+ pcs440ep_readinputs ();
+ pcs440ep_checksha1 ();
+#ifdef CONFIG_PREBOOT
+ {
+ struct kbd_data_t kbd_data;
+ /* Decode keys */
+ char *str = strdup (key_match (get_keys (&kbd_data)));
+ /* Set or delete definition */
+ setenv ("preboot", str);
+ free (str);
+ }
+#endif /* CONFIG_PREBOOT */
return 0;
}
return (0);
}
+void spd_ddr_init_hang (void)
+{
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_ON);
+ /* we cannot use hang() because we are still running from
+ Flash, and so the status_led driver is not initialized */
+ puts ("### ERROR ### Please RESET the board ###\n");
+ for (;;) {
+ __led_toggle (4);
+ udelay (100000);
+ }
+}
+
long int initdram (int board_type)
{
long dram_size = 0;
- set_leds(1); /* display boot info counter */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_OFF);
dram_size = spd_sdram();
- set_leds(2); /* display boot info counter */
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_ON);
+ if (dram_size == 0) {
+ hang();
+ }
return dram_size;
}
}
#endif
+
+/*************************************************************************
+ * "led" Commando for the U-Boot shell
+ *
+ ************************************************************************/
+int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int rcode = 0, i;
+ ulong pattern = 0;
+
+ pattern = simple_strtoul (argv[1], NULL, 16);
+ if (pattern > 0x400) {
+ int val = GET_LEDS;
+ printf ("led: %x\n", val);
+ return rcode;
+ }
+ if (pattern > 0x200) {
+ status_led_blink ();
+ hang ();
+ return rcode;
+ }
+ if (pattern > 0x100) {
+ status_led_blink ();
+ return rcode;
+ }
+ pattern &= 0x0f;
+ for (i = 0; i < 4; i++) {
+ if (pattern & 0x01) status_led_set (i, STATUS_LED_ON);
+ else status_led_set (i, STATUS_LED_OFF);
+ pattern = pattern >> 1;
+ }
+ return rcode;
+}
+
+U_BOOT_CMD(
+ led, 2, 1, do_led,
+ "led [bitmask] - set the DIAG-LED\n",
+ "[bitmask] 0x01 = DIAG 1 on\n"
+ " 0x02 = DIAG 2 on\n"
+ " 0x04 = DIAG 3 on\n"
+ " 0x08 = DIAG 4 on\n"
+ " > 0x100 set the LED, who are on, to state blinking\n"
+);
+
+#if defined(CONFIG_SHA1_CHECK_UB_IMG)
+/*************************************************************************
+ * "sha1" Commando for the U-Boot shell
+ *
+ ************************************************************************/
+int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int rcode = -1;
+
+ if (argc < 2) {
+ usage:
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if (argc >= 3) {
+ unsigned char *data;
+ unsigned char output[20];
+ int len;
+ int i;
+
+ data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
+ len = simple_strtoul (argv[2], NULL, 16);
+ sha1_csum (data, len, (unsigned char *)output);
+ printf ("U-Boot sum:\n");
+ for (i = 0; i < 20 ; i++) {
+ printf ("%02X ", output[i]);
+ }
+ printf ("\n");
+ if (argc == 4) {
+ data = (unsigned char *)simple_strtoul (argv[3], NULL, 16);
+ memcpy (data, output, 20);
+ }
+ return 0;
+ }
+ if (argc == 2) {
+ char *ptr = argv[1];
+ if (*ptr != '-') goto usage;
+ ptr++;
+ if ((*ptr == 'c') || (*ptr == 'C')) {
+ rcode = pcs440ep_sha1 (1);
+ printf ("SHA1 U-Boot sum %sok!\n", (rcode != 0) ? "not " : "");
+ } else if ((*ptr == 'p') || (*ptr == 'P')) {
+ rcode = pcs440ep_sha1 (2);
+ } else {
+ rcode = pcs440ep_sha1 (0);
+ }
+ return rcode;
+ }
+ return rcode;
+}
+
+U_BOOT_CMD(
+ sha1, 4, 1, do_sha1,
+ "sha1 - calculate the SHA1 Sum\n",
+ "address len [addr] calculate the SHA1 sum [save at addr]\n"
+ " -p calculate the SHA1 sum from the U-Boot image in flash and print\n"
+ " -c check the U-Boot image in flash\n"
+);
+#endif
+
+#ifdef CONFIG_IDE_PREINIT
+int ide_preinit (void)
+{
+ /* Set True IDE Mode */
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00100000));
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
+ out32 (GPIO1_OR, (in32 (GPIO1_OR) & ~0x00008040));
+ udelay (100000);
+ return 0;
+}
+#endif
+
+#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+void ide_set_reset (int idereset)
+{
+ debug ("ide_reset(%d)\n", idereset);
+ if (idereset == 0) {
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
+ } else {
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) & ~0x00200000));
+ }
+ udelay (10000);
+}
+#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
{
cpu/ppc4xx/start.o (.text)
board/pcs440ep/init.o (.text)
+ lib_generic/sha1.o (.text)
*(.text)
*(.fixup)
void show_boot_progress(int val)
{
+ if (val < -32) val = -1; /* let things compatible */
outb(val&0xff, 0x80);
outb((val&0xff00)>>8, 0x680);
}
{
int version = read_mmcr_byte(SC520_SYSINFO);
+ if (val < -32) val = -1; /* let things compatible */
if (version == 0) {
/* PIO31-PIO16 Data */
write_mmcr_word(SC520_PIODATA31_16,
image_header_t *hdr;
int rcode = 0;
+ SHOW_BOOT_PROGRESS (34);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
break;
default:
printf ("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-35);
return 1;
}
+ SHOW_BOOT_PROGRESS (35);
if (!boot_device) {
puts ("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-36);
return 1;
}
+ SHOW_BOOT_PROGRESS (36);
dev = simple_strtoul(boot_device, &ep, 16);
if ((dev >= CFG_MAX_DOC_DEVICE) ||
(doc_dev_desc[dev].ChipID == DOC_ChipID_UNKNOWN)) {
printf ("\n** Device %d not available\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-37);
return 1;
}
+ SHOW_BOOT_PROGRESS (37);
printf ("\nLoading from device %d: %s at 0x%lX (offset 0x%lX)\n",
dev, doc_dev_desc[dev].name, doc_dev_desc[dev].physadr,
if (doc_rw (doc_dev_desc + dev, 1, offset,
SECTORSIZE, NULL, (u_char *)addr)) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-38);
return 1;
}
+ SHOW_BOOT_PROGRESS (38);
hdr = (image_header_t *)addr;
cnt -= SECTORSIZE;
} else {
puts ("\n** Bad Magic Number **\n");
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-39);
return 1;
}
+ SHOW_BOOT_PROGRESS (39);
if (doc_rw (doc_dev_desc + dev, 1, offset + SECTORSIZE, cnt,
NULL, (u_char *)(addr+SECTORSIZE))) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-40);
return 1;
}
+ SHOW_BOOT_PROGRESS (40);
/* Loading ok, update default load address */
static void output_data(int dev, ulong *sect_buf, int words);
static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
+#ifndef CFG_ATA_PORT_ADDR
+#define CFG_ATA_PORT_ADDR(port) (port)
+#endif
#ifdef CONFIG_ATAPI
static void atapi_inquiry(block_dev_desc_t *dev_desc);
image_header_t *hdr;
int rcode = 0;
+ SHOW_BOOT_PROGRESS (41);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
break;
default:
printf ("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-42);
return 1;
}
+ SHOW_BOOT_PROGRESS (42);
if (!boot_device) {
puts ("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-43);
return 1;
}
+ SHOW_BOOT_PROGRESS (43);
dev = simple_strtoul(boot_device, &ep, 16);
if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
printf ("\n** Device %d not available\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-44);
return 1;
}
+ SHOW_BOOT_PROGRESS (44);
if (*ep) {
if (*ep != ':') {
puts ("\n** Invalid boot device, use `dev[:part]' **\n");
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-45);
return 1;
}
part = simple_strtoul(++ep, NULL, 16);
}
+ SHOW_BOOT_PROGRESS (45);
if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-46);
return 1;
}
+ SHOW_BOOT_PROGRESS (46);
if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
(strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
printf ("\n** Invalid partition type \"%.32s\""
" (expect \"" BOOT_PART_TYPE "\")\n",
info.type);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-47);
return 1;
}
+ SHOW_BOOT_PROGRESS (47);
printf ("\nLoading from IDE device %d, partition %d: "
"Name: %.32s Type: %.32s\n",
if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
printf ("** Read error on %d:%d\n", dev, part);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-48);
return 1;
}
+ SHOW_BOOT_PROGRESS (48);
hdr = (image_header_t *)addr;
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
printf("\n** Bad Magic Number **\n");
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-49);
return 1;
}
+ SHOW_BOOT_PROGRESS (49);
checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
puts ("\n** Bad Header Checksum **\n");
- SHOW_BOOT_PROGRESS (-2);
+ SHOW_BOOT_PROGRESS (-50);
return 1;
}
+ SHOW_BOOT_PROGRESS (50);
hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
print_image_hdr (hdr);
if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
(ulong *)(addr+info.blksz)) != cnt) {
printf ("** Read error on %d:%d\n", dev, part);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-51);
return 1;
}
+ SHOW_BOOT_PROGRESS (51);
/* Loading ok, update default load address */
/* Ensure I/O operations complete */
EIEIO;
- *((uchar *)(ATA_CURR_BASE(dev)+port)) = val;
+ *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val;
}
#else /* ! __PPC__ */
static void __inline__
ide_outb(int dev, int port, unsigned char val)
{
- outb(val, ATA_CURR_BASE(dev)+port);
+ outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
}
#endif /* __PPC__ */
uchar val;
/* Ensure I/O operations complete */
EIEIO;
- val = *((uchar *)(ATA_CURR_BASE(dev)+port));
+ val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
dev, port, (ATA_CURR_BASE(dev)+port), val);
return (val);
static unsigned char __inline__
ide_inb(int dev, int port)
{
- return inb(ATA_CURR_BASE(dev)+port);
+ return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
}
#endif /* __PPC__ */
#ifdef __MIPS__
*dbuf++ = swab16p((u16*)pbuf);
*dbuf++ = swab16p((u16*)pbuf);
+#elif defined(CONFIG_PCS440EP)
+ *dbuf++ = *pbuf;
+ *dbuf++ = *pbuf;
#else
*dbuf++ = ld_le16(pbuf);
*dbuf++ = ld_le16(pbuf);
pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
dbuf = (ushort *)sect_buf;
while (words--) {
+#if defined(CONFIG_PCS440EP)
+ /* not tested, because CF was write protected */
+ EIEIO;
+ *pbuf = ld_le16(dbuf++);
+ EIEIO;
+ *pbuf = ld_le16(dbuf++);
+#else
EIEIO;
*pbuf = *dbuf++;
EIEIO;
*pbuf = *dbuf++;
+#endif
}
#endif
}
debug("in input data base for read is %lx\n", (unsigned long) pbuf);
while (words--) {
+#if defined(CONFIG_PCS440EP)
+ EIEIO;
+ *dbuf++ = ld_le16(pbuf);
+ EIEIO;
+ *dbuf++ = ld_le16(pbuf);
+#else
EIEIO;
*dbuf++ = *pbuf;
EIEIO;
*dbuf++ = *pbuf;
+#endif
}
#endif
}
r = nand_read(nand, offset, &cnt, (u_char *) addr);
if (r) {
puts("** Read error\n");
- SHOW_BOOT_PROGRESS(-1);
+ SHOW_BOOT_PROGRESS(-56);
return 1;
}
+ SHOW_BOOT_PROGRESS(56);
hdr = (image_header_t *) addr;
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
printf("\n** Bad Magic Number 0x%x **\n", hdr->ih_magic);
- SHOW_BOOT_PROGRESS(-1);
+ SHOW_BOOT_PROGRESS(-57);
return 1;
}
+ SHOW_BOOT_PROGRESS(57);
print_image_hdr(hdr);
r = nand_read(nand, offset, &cnt, (u_char *) addr);
if (r) {
puts("** Read error\n");
- SHOW_BOOT_PROGRESS(-1);
+ SHOW_BOOT_PROGRESS(-58);
return 1;
}
+ SHOW_BOOT_PROGRESS(58);
/* Loading ok, update default load address */
}
#endif
+ SHOW_BOOT_PROGRESS(52);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
usage:
#endif
printf("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS(-1);
+ SHOW_BOOT_PROGRESS(-53);
return 1;
}
+ SHOW_BOOT_PROGRESS(53);
if (!boot_device) {
puts("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS(-1);
+ SHOW_BOOT_PROGRESS(-54);
return 1;
}
+ SHOW_BOOT_PROGRESS(54);
idx = simple_strtoul(boot_device, NULL, 16);
if (idx < 0 || idx >= CFG_MAX_NAND_DEVICE || !nand_info[idx].name) {
printf("\n** Device %d not available\n", idx);
- SHOW_BOOT_PROGRESS(-1);
+ SHOW_BOOT_PROGRESS(-55);
return 1;
}
+ SHOW_BOOT_PROGRESS(55);
return nand_load_image(cmdtp, &nand_info[idx], offset, addr, argv[0]);
}
ulong offset = 0;
image_header_t *hdr;
int rcode = 0;
+ SHOW_BOOT_PROGRESS(52);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
break;
default:
printf ("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-53);
return 1;
}
+ SHOW_BOOT_PROGRESS(53);
if (!boot_device) {
puts ("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-54);
return 1;
}
+ SHOW_BOOT_PROGRESS(54);
dev = simple_strtoul(boot_device, &ep, 16);
if ((dev >= CFG_MAX_NAND_DEVICE) ||
(nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN)) {
printf ("\n** Device %d not available\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-55);
return 1;
}
+ SHOW_BOOT_PROGRESS(55);
printf ("\nLoading from device %d: %s at 0x%lx (offset 0x%lx)\n",
dev, nand_dev_desc[dev].name, nand_dev_desc[dev].IO_ADDR,
if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ, offset,
SECTORSIZE, NULL, (u_char *)addr)) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-56);
return 1;
}
+ SHOW_BOOT_PROGRESS(56);
hdr = (image_header_t *)addr;
cnt -= SECTORSIZE;
} else {
printf ("\n** Bad Magic Number 0x%x **\n", ntohl(hdr->ih_magic));
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-57);
return 1;
}
+ SHOW_BOOT_PROGRESS(57);
if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ,
offset + SECTORSIZE, cnt, NULL,
(u_char *)(addr+SECTORSIZE))) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-58);
return 1;
}
+ SHOW_BOOT_PROGRESS(58);
/* Loading ok, update default load address */
#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+# include <status_led.h>
+extern void show_boot_progress (int val);
+# define SHOW_BOOT_PROGRESS(arg) show_boot_progress (arg)
+#else
+# define SHOW_BOOT_PROGRESS(arg)
+#endif
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
break;
default: printf ("Usage:\n%s\n", cmdtp->usage);
+ SHOW_BOOT_PROGRESS(-80);
return 1;
}
- if ((size = NetLoop(proto)) < 0)
+ SHOW_BOOT_PROGRESS(80);
+ if ((size = NetLoop(proto)) < 0) {
+ SHOW_BOOT_PROGRESS(-81);
return 1;
+ }
+ SHOW_BOOT_PROGRESS(81);
/* NetLoop ok, update environment */
netboot_update_env();
/* done if no file was loaded (no errors though) */
- if (size == 0)
+ if (size == 0) {
+ SHOW_BOOT_PROGRESS(-82);
return 0;
+ }
/* flush cache */
flush_cache(load_addr, size);
printf ("Automatic boot of image at addr 0x%08lX ...\n",
load_addr);
+ SHOW_BOOT_PROGRESS(82);
rcode = do_bootm (cmdtp, 0, 1, local_args);
}
#ifdef CONFIG_AUTOSCRIPT
if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) {
printf("Running autoscript at addr 0x%08lX ...\n", load_addr);
+ SHOW_BOOT_PROGRESS(83);
rcode = autoscript (load_addr);
}
+#endif
+#if defined(CONFIG_SHOW_BOOT_PROGRESS)
+ if (rcode < 0)
+ SHOW_BOOT_PROGRESS(-83);
+ else
+ SHOW_BOOT_PROGRESS(84);
#endif
return rcode;
}
}
if (!reiserfs_mount(part_length)) {
- printf ("** Bad Reisefs partition or disk - %s %d:%d **\n", argv[1], dev, part);
+ printf ("** Bad Reiserfs partition or disk - %s %d:%d **\n", argv[1], dev, part);
return 1;
}
return 1;
}
- if (strncmp(info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) {
+ if (strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) {
printf ("\n** Invalid partition type \"%.32s\""
" (expect \"" BOOT_PART_TYPE "\")\n",
info.type);
}
if (!reiserfs_mount(part_length)) {
- printf ("** Bad Reisefs partition or disk - %s %d:%d **\n", argv[1], dev, part);
+ printf ("** Bad Reiserfs partition or disk - %s %d:%d **\n", argv[1], dev, part);
return 1;
}
puts ("Using default environment\n\n");
#else
puts ("*** Warning - bad CRC, using default environment\n\n");
- SHOW_BOOT_PROGRESS (-1);
+ SHOW_BOOT_PROGRESS (-60);
#endif
if (sizeof(default_environment) > ENV_SIZE)
#define ONE_BILLION 1000000000
+/*
+ * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
+ */
+void __spd_ddr_init_hang (void)
+{
+ hang ();
+}
+void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang")));
+
/*-----------------------------------------------------------------------------
| Memory Controller Options 0
+-----------------------------------------------------------------------------*/
if (dimm_found == FALSE) {
printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
dimm_num);
printf("Only DDR SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
}
}
if (voltage_type != 0x04) {
printf("ERROR: DIMM %lu with unsupported voltage level.\n",
dimm_num);
- hang();
+ spd_ddr_init_hang ();
} else {
debug("DIMM %lu voltage level supported.\n", dimm_num);
}
printf("WARNING: DIMM with datawidth of %lu bits.\n",
data_width);
printf("Only DIMMs with 32 or 64 bit datawidths supported.\n");
- hang();
+ spd_ddr_init_hang ();
}
break;
}
if ((tcyc_reg & 0x0F) >= 10) {
printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n",
dimm_num);
- hang();
+ spd_ddr_init_hang ();
}
cycle_time_ns_x_10[cas_index] =
printf("ERROR: No supported CAS latency with the installed DIMMs.\n");
printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n");
printf("Make sure the PLB speed is within the supported range.\n");
- hang();
+ spd_ddr_init_hang ();
}
/*
*/
for (i = 0; i < NUMMEMTESTS; i++) {
for (j = 0; j < NUMMEMWORDS; j++) {
+//printf("bank enabled base:%x\n", &membase[j]);
membase[j] = test[i][j];
ppcDcbf((unsigned long)&(membase[j]));
}
*/
if (window_found == FALSE) {
printf("ERROR: Cannot determine a common read delay.\n");
- hang();
+ spd_ddr_init_hang ();
}
/*
printf("ERROR: Unsupported value for the banksize: %d.\n",
bank_size_id);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
switch (num_col_addr) {
printf("ERROR: Unsupported value for number of "
"column addresses: %d.\n", num_col_addr);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
/*
#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
#endif
+/*
+ * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
+ */
+void __spd_ddr_init_hang (void)
+{
+ hang ();
+}
+void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang")));
+
+
/* Private Structure Definitions */
/* enum only to ease code for cas latency setting */
if (dimm_found == FALSE) {
printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
"slot %d.\n", (unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 2:
printf("ERROR: EDO DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 3:
printf("ERROR: Pipelined Nibble DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 4:
printf("ERROR: SDRAM DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 5:
printf("ERROR: Multiplexed ROM DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 6:
printf("ERROR: SGRAM DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 7:
debug("DIMM slot %d: DDR1 SDRAM detected\n", dimm_num);
(unsigned int)dimm_num);
printf("Only DDR1 and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
}
}
&& (dimm_populated[dimm_num] != SDRAM_NONE)
&& (dimm_populated[dimm_num-1] != dimm_populated[dimm_num])) {
printf("ERROR: DIMM's DDR1 and DDR2 type can not be mixed.\n");
- hang();
+ spd_ddr_init_hang ();
}
}
}
(unsigned int)(calc_cycle_time*10));
printf("Replace the DIMM, or change DDR frequency via "
"strapping bits.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
}
"slot %d is not supported.\n", dimm_rank, dimm_num);
printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
} else
total_rank += dimm_rank;
}
"for all slots.\n", (unsigned int)total_rank);
printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS);
printf("Remove one of the DIMM modules.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
}
printf("This DIMM is 5.0 Volt/TTL.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x01:
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("This DIMM is LVTTL.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x02:
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("This DIMM is 1.5 Volt.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x03:
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("This DIMM is 3.3 Volt/TTL.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x04:
/* 2.5 Voltage only for DDR1 */
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
}
}
if ((dimm_populated[0] != SDRAM_NONE) && (dimm_populated[1] != SDRAM_NONE)) {
if (buf0 != buf1) {
printf("ERROR: DIMM's buffered/unbuffered, registered, clocking don't match.\n");
- hang();
+ spd_ddr_init_hang ();
}
}
if ((dimm_64bit == TRUE) && (dimm_32bit == TRUE)) {
printf("ERROR: Cannot mix 32 bit and 64 bit DDR-SDRAM DIMMs together.\n");
- hang();
+ spd_ddr_init_hang ();
}
else if ((dimm_64bit == TRUE) && (dimm_32bit == FALSE)) {
mcopt1 |= SDRAM_MCOPT1_DMWD_64;
mcopt1 |= SDRAM_MCOPT1_DMWD_32;
} else {
printf("ERROR: Please install only 32 or 64 bit DDR-SDRAM DIMMs.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
if (ecc_enabled == TRUE)
break;
default:
printf("ERROR: ucode error on selected_cas value %d", selected_cas);
- hang();
+ spd_ddr_init_hang ();
break;
}
break;
default:
printf("ERROR: write recovery not support (%d)", write_recovery);
- hang();
+ spd_ddr_init_hang ();
break;
}
#else
ods = ODS_REDUCED;
} else {
printf("ERROR: Unsupported number of DIMM's (%d)", total_dimm);
- hang();
+ spd_ddr_init_hang ();
}
mr = CMD_EMR | SELECT_MR | BURST_LEN_4 | wr | cas;
mtsdram(SDRAM_INITPLR13, 0x80800000 | emr); /* EMR OCD Exit */
} else {
printf("ERROR: ucode error as unknown DDR type in program_initplr");
- hang();
+ spd_ddr_init_hang ();
}
}
} else {
printf("ERROR: SPD reported Tcyc is incorrect for DIMM "
"in slot %d\n", (unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
}
} else {
/* Convert from hex to decimal */
printf("ERROR: Cannot find a supported CAS latency with the installed DIMMs.\n");
printf("Only DIMMs DDR1 with CAS latencies of 2.0, 2.5, and 3.0 are supported.\n");
printf("Make sure the PLB speed is within the supported range of the DIMMs.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
} else { /* DDR2 */
debug("cas_3_0_available=%d\n", cas_3_0_available);
cas_3_0_available, cas_4_0_available, cas_5_0_available);
printf("sdram_freq=%d cycle3=%d cycle4=%d cycle5=%d\n\n",
sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk);
- hang();
+ spd_ddr_init_hang ();
}
}
printf("ERROR: DIMM %d unsupported refresh rate/type.\n",
(unsigned int)dimm_num);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
}
printf("ERROR: Unsupported value for number of "
"column addresses: %d.\n", (unsigned int)num_col_addr);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
printf("ERROR: Unsupported value for the banksize: %d.\n",
(unsigned int)rank_size_id);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
if ((dimm_populated[dimm_num] != SDRAM_NONE) && (dimm_num == 1))
printf("\nERROR: Cannot determine a common read delay for the "
"DIMM(s) installed.\n");
debug("%s[%d] ERROR : \n", __FUNCTION__,__LINE__);
- hang();
+ spd_ddr_init_hang ();
}
blank_string(strlen(str));
if (window_found == FALSE) {
printf("ERROR: Cannot determine a common read delay for the "
"DIMM(s) installed.\n");
- hang();
+ spd_ddr_init_hang ();
}
/*------------------------------------------------------------------
*/
#ifdef CONFIG_440
.globl dcache_disable
- .globl icache_disable
+ .globl icache_disable
.globl icache_enable
dcache_disable:
icache_disable:
(CONFIG_COMMANDS & CFG_CMD_SCSI) || \
(CONFIG_COMMANDS & CFG_CMD_USB) || \
defined(CONFIG_MMC) || \
- (defined(CONFIG_MMC) && defined(CONFIG_LPC2292)) || \
defined(CONFIG_SYSTEMACE) )
#if defined(CONFIG_MAC_PARTITION) || \
int get_partition_info (block_dev_desc_t *dev_desc, int part
, disk_partition_t *info)
{
- switch (dev_desc->part_type) {
+ switch (dev_desc->part_type) {
#ifdef CONFIG_MAC_PARTITION
case PART_TYPE_MAC:
if (get_partition_info_mac(dev_desc,part,info) == 0) {
--- /dev/null
+SHA1 usage:
+-----------
+
+In the U-Boot Image for the pcs440ep board is a SHA1 checksum integrated.
+This SHA1 sum is used, to check, if the U-Boot Image in Flash is not
+corrupted.
+
+The following command is available:
+
+=> help sha1
+sha1 address len [addr] calculate the SHA1 sum [save at addr]
+ -p calculate the SHA1 sum from the U-Boot image in flash and print
+ -c check the U-Boot image in flash
+
+"sha1 -p"
+ calculates and prints the SHA1 sum, from the Image stored in Flash
+
+"sha1 -c"
+ check, if the SHA1 sum from the Image stored in Flash is correct
+
+
+It is possible to calculate a SHA1 checksum from a memoryrange with:
+
+"sha1 address len"
+
+If you want to store a new Image in Flash for the pcs440ep board,
+which has no SHA1 sum, you can do the following:
+
+a) cp the new Image on a position in RAM (here 0x300000)
+ (for this example we use the Image from Flash, stored at 0xfffa0000 and
+ 0x60000 Bytes long)
+
+"cp.b fffa0000 300000 60000"
+
+b) Initialize the SHA1 sum in the Image with 0x00
+ The SHA1 sum is stored in Flash at:
+ CFG_MONITOR_BASE + CFG_MONITOR_LEN + SHA1_SUM_POS
+ for the pcs440ep Flash: 0xfffa0000 + 0x60000 + -0x20
+ = 0xffffffe0
+ for the example in RAM: 0x300000 + 0x60000 + -0x20
+ = 0x35ffe0
+
+ note: a SHA1 checksum is 20 bytes long.
+
+"mw.b 35ffe0 0 14"
+
+c) now calculate the SHA1 sum from the memoryrange and write
+ the calculated checksum at the right place:
+
+"sha1 300000 60000 35ffe0"
+
+Now you have a U-Boot-Image for the pcs440ep board with the correct SHA1 sum.
+
+If you do a "./MAKEALL pcs440ep" or a "make all" to get the U-Boot image,
+the correct SHA1 sum will be automagically included in the U-Boot image.
+
+Heiko Schocher, 11 Jul 2007
fat_register_device(block_dev_desc_t *dev_desc, int part_no)
{
unsigned char buffer[SECTOR_SIZE];
+ disk_partition_t info;
if (!dev_desc->block_read)
return -1;
- cur_dev=dev_desc;
+ cur_dev = dev_desc;
/* check if we have a MBR (on floppies we have only a PBR) */
if (dev_desc->block_read (dev_desc->dev, 0, 1, (ulong *) buffer) != 1) {
printf ("** Can't read from device %d **\n", dev_desc->dev);
/* no signature found */
return -1;
}
- if(!strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET],"FAT",3)) {
- /* ok, we assume we are on a PBR only */
- cur_part = 1;
- part_offset=0;
- }
- else {
#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
(CONFIG_COMMANDS & CFG_CMD_SCSI) || \
(CONFIG_COMMANDS & CFG_CMD_USB) || \
- (defined(CONFIG_MMC) && defined(CONFIG_LPC2292)) || \
+ (defined(CONFIG_MMC)) || \
defined(CONFIG_SYSTEMACE) )
- disk_partition_t info;
- if(!get_partition_info(dev_desc, part_no, &info)) {
- part_offset = info.start;
- cur_part = part_no;
- }
- else {
- printf ("** Partition %d not valid on device %d **\n",part_no,dev_desc->dev);
- return -1;
- }
+ /* First we assume, there is a MBR */
+ if (!get_partition_info (dev_desc, part_no, &info)) {
+ part_offset = info.start;
+ cur_part = part_no;
+ } else if (!strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], "FAT", 3)) {
+ /* ok, we assume we are on a PBR only */
+ cur_part = 1;
+ part_offset = 0;
+ } else {
+ printf ("** Partition %d not valid on device %d **\n", part_no, dev_desc->dev);
+ return -1;
+ }
#else
+ if(!strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET],"FAT",3)) {
+ /* ok, we assume we are on a PBR only */
+ cur_part = 1;
+ part_offset = 0;
+ info.start = part_offset;
+ } else {
/* FIXME we need to determine the start block of the
* partition where the DOS FS resides. This can be done
* by using the get_partition_info routine. For this
* purpose the libpart must be included.
*/
- part_offset=32;
+ part_offset = 32;
cur_part = 1;
-#endif
}
+#endif
return 0;
}
#ifdef CFG_ENV_IS_IN_FLASH
#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
-#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+#define CONFIG_ENV_OVERWRITE 1
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
#endif /* CFG_ENV_IS_IN_FLASH */
+#define ENV_NAME_REVLEV "revision_level"
+#define ENV_NAME_SOLDER "solder_switch"
+#define ENV_NAME_DIP "dip"
+
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
#undef CONFIG_DDR_ECC /* don't use ECC */
#define SPD_EEPROM_ADDRESS {0x50}
+#define CONFIG_PROG_SDRAM_TLB 1
/*-----------------------------------------------------------------------
* I2C
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=pcs440ep\0" \
+ "use_eeprom_ethaddr=default\0" \
+ "cs_test=off\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+/* check U-Boot image with SHA1 sum */
+#define CONFIG_SHA1_CHECK_UB_IMG 1
+#define CONFIG_SHA1_START CFG_MONITOR_BASE
+#define CONFIG_SHA1_LEN CFG_MONITOR_LEN
+
+/*-----------------------------------------------------------------------
+ * Definitions for status LED
+ */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+#define CONFIG_BOARD_SPECIFIC_LED 1
+
+#define STATUS_LED_BIT 0x08 /* DIAG1 is on GPIO_PPC_1 */
+#define STATUS_LED_PERIOD ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE STATUS_LED_OFF
+#define STATUS_LED_BIT1 0x04 /* DIAG2 is on GPIO_PPC_2 */
+#define STATUS_LED_PERIOD1 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE1 STATUS_LED_ON
+#define STATUS_LED_BIT2 0x02 /* DIAG3 is on GPIO_PPC_3 */
+#define STATUS_LED_PERIOD2 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE2 STATUS_LED_OFF
+#define STATUS_LED_BIT3 0x01 /* DIAG4 is on GPIO_PPC_4 */
+#define STATUS_LED_PERIOD3 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE3 STATUS_LED_OFF
+
+#define CONFIG_SHOW_BOOT_PROGRESS 1
+
#define CONFIG_BAUDRATE 115200
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
CFG_CMD_DIAG | \
CFG_CMD_EEPROM | \
CFG_CMD_ELF | \
+ CFG_CMD_EXT2 | \
+ CFG_CMD_FAT | \
CFG_CMD_I2C | \
+ CFG_CMD_IDE | \
CFG_CMD_IRQ | \
CFG_CMD_MII | \
CFG_CMD_NET | \
CFG_CMD_PCI | \
CFG_CMD_PING | \
CFG_CMD_REGINFO | \
+ CFG_CMD_REISER | \
CFG_CMD_SDRAM | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FAT | \
CFG_CMD_USB )
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
+
+#define CONFIG_IDE_PREINIT 1
+#define CONFIG_IDE_RESET 1
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_CF1
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET 0
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x0000)
+
+/* These addresses need to be shifted one place to the left
+ * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
+ * These values are shifted
+ */
+#define CFG_ATA_PORT_ADDR(port) ((port) << 1)
+
#endif /* __CONFIG_H */
--- /dev/null
+/**
+ * \file sha1.h
+ * based from http://xyssl.org/code/source/sha1/
+ * FIPS-180-1 compliant SHA-1 implementation
+ *
+ * Copyright (C) 2003-2006 Christophe Devine
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License, version 2.1 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+/*
+ * The SHA-1 standard was published by NIST in 1993.
+ *
+ * http://www.itl.nist.gov/fipspubs/fip180-1.htm
+ */
+#ifndef _SHA1_H
+#define _SHA1_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SHA1_SUM_POS -0x20
+#define SHA1_SUM_LEN 20
+
+/**
+ * \brief SHA-1 context structure
+ */
+typedef struct
+{
+ unsigned long total[2]; /*!< number of bytes processed */
+ unsigned long state[5]; /*!< intermediate digest state */
+ unsigned char buffer[64]; /*!< data block being processed */
+}
+sha1_context;
+
+/**
+ * \brief SHA-1 context setup
+ *
+ * \param ctx SHA-1 context to be initialized
+ */
+void sha1_starts( sha1_context *ctx );
+
+/**
+ * \brief SHA-1 process buffer
+ *
+ * \param ctx SHA-1 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ */
+void sha1_update( sha1_context *ctx, unsigned char *input, int ilen );
+
+/**
+ * \brief SHA-1 final digest
+ *
+ * \param ctx SHA-1 context
+ * \param output SHA-1 checksum result
+ */
+void sha1_finish( sha1_context *ctx, unsigned char output[20] );
+
+/**
+ * \brief Output = SHA-1( input buffer )
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output SHA-1 checksum result
+ */
+void sha1_csum( unsigned char *input, int ilen,
+ unsigned char output[20] );
+
+/**
+ * \brief Output = SHA-1( file contents )
+ *
+ * \param path input file name
+ * \param output SHA-1 checksum result
+ * \return 0 if successful, or 1 if fopen failed
+ */
+int sha1_file( char *path, unsigned char output[20] );
+
+/**
+ * \brief Output = HMAC-SHA-1( input buffer, hmac key )
+ *
+ * \param key HMAC secret key
+ * \param keylen length of the HMAC key
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output HMAC-SHA-1 result
+ */
+void sha1_hmac( unsigned char *key, int keylen,
+ unsigned char *input, int ilen,
+ unsigned char output[20] );
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int sha1_self_test( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* sha1.h */
#define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
+#elif defined(CONFIG_BOARD_SPECIFIC_LED)
+/* led_id_t is unsigned long mask */
+typedef unsigned long led_id_t;
+
+extern void __led_toggle (led_id_t mask);
+extern void __led_init (led_id_t mask, int state);
+extern void __led_set (led_id_t mask, int state);
#else
# error Status LED configuration missing
#endif
COBJS = bzlib.o bzlib_crctable.o bzlib_decompress.o \
bzlib_randtable.o bzlib_huffman.o \
- crc32.o ctype.o display_options.o ldiv.o \
+ crc32.o ctype.o display_options.o ldiv.o sha1.o \
string.o vsprintf.o zlib.o
SRCS := $(COBJS:.o=.c)
--- /dev/null
+/*
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ * based on:
+ * FIPS-180-1 compliant SHA-1 implementation
+ *
+ * Copyright (C) 2003-2006 Christophe Devine
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License, version 2.1 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+/*
+ * The SHA-1 standard was published by NIST in 1993.
+ *
+ * http://www.itl.nist.gov/fipspubs/fip180-1.htm
+ */
+
+#ifndef _CRT_SECURE_NO_DEPRECATE
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+#include <linux/string.h>
+#include "sha1.h"
+
+/*
+ * 32-bit integer manipulation macros (big endian)
+ */
+#ifndef GET_UINT32_BE
+#define GET_UINT32_BE(n,b,i) { \
+ (n) = ( (unsigned long) (b)[(i) ] << 24 ) \
+ | ( (unsigned long) (b)[(i) + 1] << 16 ) \
+ | ( (unsigned long) (b)[(i) + 2] << 8 ) \
+ | ( (unsigned long) (b)[(i) + 3] ); \
+}
+#endif
+#ifndef PUT_UINT32_BE
+#define PUT_UINT32_BE(n,b,i) { \
+ (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
+ (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
+ (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
+ (b)[(i) + 3] = (unsigned char) ( (n) ); \
+}
+#endif
+
+/*
+ * SHA-1 context setup
+ */
+void sha1_starts (sha1_context * ctx)
+{
+ ctx->total[0] = 0;
+ ctx->total[1] = 0;
+
+ ctx->state[0] = 0x67452301;
+ ctx->state[1] = 0xEFCDAB89;
+ ctx->state[2] = 0x98BADCFE;
+ ctx->state[3] = 0x10325476;
+ ctx->state[4] = 0xC3D2E1F0;
+}
+
+static void sha1_process (sha1_context * ctx, unsigned char data[64])
+{
+ unsigned long temp, W[16], A, B, C, D, E;
+
+ GET_UINT32_BE (W[0], data, 0);
+ GET_UINT32_BE (W[1], data, 4);
+ GET_UINT32_BE (W[2], data, 8);
+ GET_UINT32_BE (W[3], data, 12);
+ GET_UINT32_BE (W[4], data, 16);
+ GET_UINT32_BE (W[5], data, 20);
+ GET_UINT32_BE (W[6], data, 24);
+ GET_UINT32_BE (W[7], data, 28);
+ GET_UINT32_BE (W[8], data, 32);
+ GET_UINT32_BE (W[9], data, 36);
+ GET_UINT32_BE (W[10], data, 40);
+ GET_UINT32_BE (W[11], data, 44);
+ GET_UINT32_BE (W[12], data, 48);
+ GET_UINT32_BE (W[13], data, 52);
+ GET_UINT32_BE (W[14], data, 56);
+ GET_UINT32_BE (W[15], data, 60);
+
+#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n)))
+
+#define R(t) ( \
+ temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \
+ W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \
+ ( W[t & 0x0F] = S(temp,1) ) \
+)
+
+#define P(a,b,c,d,e,x) { \
+ e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \
+}
+
+ A = ctx->state[0];
+ B = ctx->state[1];
+ C = ctx->state[2];
+ D = ctx->state[3];
+ E = ctx->state[4];
+
+#define F(x,y,z) (z ^ (x & (y ^ z)))
+#define K 0x5A827999
+
+ P (A, B, C, D, E, W[0]);
+ P (E, A, B, C, D, W[1]);
+ P (D, E, A, B, C, W[2]);
+ P (C, D, E, A, B, W[3]);
+ P (B, C, D, E, A, W[4]);
+ P (A, B, C, D, E, W[5]);
+ P (E, A, B, C, D, W[6]);
+ P (D, E, A, B, C, W[7]);
+ P (C, D, E, A, B, W[8]);
+ P (B, C, D, E, A, W[9]);
+ P (A, B, C, D, E, W[10]);
+ P (E, A, B, C, D, W[11]);
+ P (D, E, A, B, C, W[12]);
+ P (C, D, E, A, B, W[13]);
+ P (B, C, D, E, A, W[14]);
+ P (A, B, C, D, E, W[15]);
+ P (E, A, B, C, D, R (16));
+ P (D, E, A, B, C, R (17));
+ P (C, D, E, A, B, R (18));
+ P (B, C, D, E, A, R (19));
+
+#undef K
+#undef F
+
+#define F(x,y,z) (x ^ y ^ z)
+#define K 0x6ED9EBA1
+
+ P (A, B, C, D, E, R (20));
+ P (E, A, B, C, D, R (21));
+ P (D, E, A, B, C, R (22));
+ P (C, D, E, A, B, R (23));
+ P (B, C, D, E, A, R (24));
+ P (A, B, C, D, E, R (25));
+ P (E, A, B, C, D, R (26));
+ P (D, E, A, B, C, R (27));
+ P (C, D, E, A, B, R (28));
+ P (B, C, D, E, A, R (29));
+ P (A, B, C, D, E, R (30));
+ P (E, A, B, C, D, R (31));
+ P (D, E, A, B, C, R (32));
+ P (C, D, E, A, B, R (33));
+ P (B, C, D, E, A, R (34));
+ P (A, B, C, D, E, R (35));
+ P (E, A, B, C, D, R (36));
+ P (D, E, A, B, C, R (37));
+ P (C, D, E, A, B, R (38));
+ P (B, C, D, E, A, R (39));
+
+#undef K
+#undef F
+
+#define F(x,y,z) ((x & y) | (z & (x | y)))
+#define K 0x8F1BBCDC
+
+ P (A, B, C, D, E, R (40));
+ P (E, A, B, C, D, R (41));
+ P (D, E, A, B, C, R (42));
+ P (C, D, E, A, B, R (43));
+ P (B, C, D, E, A, R (44));
+ P (A, B, C, D, E, R (45));
+ P (E, A, B, C, D, R (46));
+ P (D, E, A, B, C, R (47));
+ P (C, D, E, A, B, R (48));
+ P (B, C, D, E, A, R (49));
+ P (A, B, C, D, E, R (50));
+ P (E, A, B, C, D, R (51));
+ P (D, E, A, B, C, R (52));
+ P (C, D, E, A, B, R (53));
+ P (B, C, D, E, A, R (54));
+ P (A, B, C, D, E, R (55));
+ P (E, A, B, C, D, R (56));
+ P (D, E, A, B, C, R (57));
+ P (C, D, E, A, B, R (58));
+ P (B, C, D, E, A, R (59));
+
+#undef K
+#undef F
+
+#define F(x,y,z) (x ^ y ^ z)
+#define K 0xCA62C1D6
+
+ P (A, B, C, D, E, R (60));
+ P (E, A, B, C, D, R (61));
+ P (D, E, A, B, C, R (62));
+ P (C, D, E, A, B, R (63));
+ P (B, C, D, E, A, R (64));
+ P (A, B, C, D, E, R (65));
+ P (E, A, B, C, D, R (66));
+ P (D, E, A, B, C, R (67));
+ P (C, D, E, A, B, R (68));
+ P (B, C, D, E, A, R (69));
+ P (A, B, C, D, E, R (70));
+ P (E, A, B, C, D, R (71));
+ P (D, E, A, B, C, R (72));
+ P (C, D, E, A, B, R (73));
+ P (B, C, D, E, A, R (74));
+ P (A, B, C, D, E, R (75));
+ P (E, A, B, C, D, R (76));
+ P (D, E, A, B, C, R (77));
+ P (C, D, E, A, B, R (78));
+ P (B, C, D, E, A, R (79));
+
+#undef K
+#undef F
+
+ ctx->state[0] += A;
+ ctx->state[1] += B;
+ ctx->state[2] += C;
+ ctx->state[3] += D;
+ ctx->state[4] += E;
+}
+
+/*
+ * SHA-1 process buffer
+ */
+void sha1_update (sha1_context * ctx, unsigned char *input, int ilen)
+{
+ int fill;
+ unsigned long left;
+
+ if (ilen <= 0)
+ return;
+
+ left = ctx->total[0] & 0x3F;
+ fill = 64 - left;
+
+ ctx->total[0] += ilen;
+ ctx->total[0] &= 0xFFFFFFFF;
+
+ if (ctx->total[0] < (unsigned long) ilen)
+ ctx->total[1]++;
+
+ if (left && ilen >= fill) {
+ memcpy ((void *) (ctx->buffer + left), (void *) input, fill);
+ sha1_process (ctx, ctx->buffer);
+ input += fill;
+ ilen -= fill;
+ left = 0;
+ }
+
+ while (ilen >= 64) {
+ sha1_process (ctx, input);
+ input += 64;
+ ilen -= 64;
+ }
+
+ if (ilen > 0) {
+ memcpy ((void *) (ctx->buffer + left), (void *) input, ilen);
+ }
+}
+
+static const unsigned char sha1_padding[64] = {
+ 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*
+ * SHA-1 final digest
+ */
+void sha1_finish (sha1_context * ctx, unsigned char output[20])
+{
+ unsigned long last, padn;
+ unsigned long high, low;
+ unsigned char msglen[8];
+
+ high = (ctx->total[0] >> 29)
+ | (ctx->total[1] << 3);
+ low = (ctx->total[0] << 3);
+
+ PUT_UINT32_BE (high, msglen, 0);
+ PUT_UINT32_BE (low, msglen, 4);
+
+ last = ctx->total[0] & 0x3F;
+ padn = (last < 56) ? (56 - last) : (120 - last);
+
+ sha1_update (ctx, (unsigned char *) sha1_padding, padn);
+ sha1_update (ctx, msglen, 8);
+
+ PUT_UINT32_BE (ctx->state[0], output, 0);
+ PUT_UINT32_BE (ctx->state[1], output, 4);
+ PUT_UINT32_BE (ctx->state[2], output, 8);
+ PUT_UINT32_BE (ctx->state[3], output, 12);
+ PUT_UINT32_BE (ctx->state[4], output, 16);
+}
+
+/*
+ * Output = SHA-1( input buffer )
+ */
+void sha1_csum (unsigned char *input, int ilen, unsigned char output[20])
+{
+ sha1_context ctx;
+
+ sha1_starts (&ctx);
+ sha1_update (&ctx, input, ilen);
+ sha1_finish (&ctx, output);
+}
+
+/*
+ * Output = HMAC-SHA-1( input buffer, hmac key )
+ */
+void sha1_hmac (unsigned char *key, int keylen,
+ unsigned char *input, int ilen, unsigned char output[20])
+{
+ int i;
+ sha1_context ctx;
+ unsigned char k_ipad[64];
+ unsigned char k_opad[64];
+ unsigned char tmpbuf[20];
+
+ memset (k_ipad, 0x36, 64);
+ memset (k_opad, 0x5C, 64);
+
+ for (i = 0; i < keylen; i++) {
+ if (i >= 64)
+ break;
+
+ k_ipad[i] ^= key[i];
+ k_opad[i] ^= key[i];
+ }
+
+ sha1_starts (&ctx);
+ sha1_update (&ctx, k_ipad, 64);
+ sha1_update (&ctx, input, ilen);
+ sha1_finish (&ctx, tmpbuf);
+
+ sha1_starts (&ctx);
+ sha1_update (&ctx, k_opad, 64);
+ sha1_update (&ctx, tmpbuf, 20);
+ sha1_finish (&ctx, output);
+
+ memset (k_ipad, 0, 64);
+ memset (k_opad, 0, 64);
+ memset (tmpbuf, 0, 20);
+ memset (&ctx, 0, sizeof (sha1_context));
+}
+
+static const char _sha1_src[] = "_sha1_src";
+
+#ifdef SELF_TEST
+/*
+ * FIPS-180-1 test vectors
+ */
+static const char sha1_test_str[3][57] = {
+ {"abc"},
+ {"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"},
+ {""}
+};
+
+static const unsigned char sha1_test_sum[3][20] = {
+ {0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E,
+ 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D},
+ {0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE,
+ 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1},
+ {0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E,
+ 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F}
+};
+
+/*
+ * Checkup routine
+ */
+int sha1_self_test (void)
+{
+ int i, j;
+ unsigned char buf[1000];
+ unsigned char sha1sum[20];
+ sha1_context ctx;
+
+ for (i = 0; i < 3; i++) {
+ printf (" SHA-1 test #%d: ", i + 1);
+
+ sha1_starts (&ctx);
+
+ if (i < 2)
+ sha1_update (&ctx, (unsigned char *) sha1_test_str[i],
+ strlen (sha1_test_str[i]));
+ else {
+ memset (buf, 'a', 1000);
+ for (j = 0; j < 1000; j++)
+ sha1_update (&ctx, buf, 1000);
+ }
+
+ sha1_finish (&ctx, sha1sum);
+
+ if (memcmp (sha1sum, sha1_test_sum[i], 20) != 0) {
+ printf ("failed\n");
+ return (1);
+ }
+
+ printf ("passed\n");
+ }
+
+ printf ("\n");
+ return (0);
+}
+#else
+int sha1_self_test (void)
+{
+ return (0);
+}
+#endif
#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
defined(CONFIG_TQM8272) || \
- defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
+ defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \
+ defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP)
load_sernum_ethaddr ();
#endif
/* IP Address */
serial_buffered_init();
#endif
-#ifdef CONFIG_STATUS_LED
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if defined(CONFIG_SHOW_BOOT_PROGRESS)
+# include <status_led.h>
+extern void show_ethcfg_progress (int arg);
+# define SHOW_BOOT_PROGRESS(arg) show_boot_progress (arg)
+#else
+# define SHOW_BOOT_PROGRESS(arg)
+#endif
+
#ifdef CFG_GT_6426x
extern int gt6426x_eth_initialize(bd_t *bis);
#endif
eth_devices = NULL;
eth_current = NULL;
+ SHOW_BOOT_PROGRESS(64);
#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
miiphy_init();
#endif
if (!eth_devices) {
puts ("No ethernet found.\n");
+ SHOW_BOOT_PROGRESS(-64);
} else {
struct eth_device *dev = eth_devices;
char *ethprime = getenv ("ethprime");
+ SHOW_BOOT_PROGRESS(65);
do {
if (eth_number)
puts (", ");
blr
/* Test instructions.
- */
+ */
cache_post_test_inst:
li r3, 0
li r3, -1
{
if (mfspr(ccr0) & CCR0_DAPUIB)
return 0; /* Disabled */
- else
+ else
return 1; /* Enabled */
}
#include <asm/processor.h>
-static struct
-{
- int number;
- char * name;
- unsigned long mask;
- unsigned long value;
+static struct {
+ int number;
+ char * name;
+ unsigned long mask;
+ unsigned long value;
} spr_test_list [] = {
/* Standard Special-Purpose Registers */
{0x11f, "PVR", 0x00000000, 0x00000000},
/* Additional Special-Purpose Registers.
- * The values must match the initialization
+ * The values must match the initialization
* values from cpu/ppc4xx/start.S
*/
{0x30, "PID", 0x00000000, 0x00000000},
# MA 02111-1307 USA
#
-BIN_FILES = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX)
+BIN_FILES = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) ubsha1$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX)
-OBJ_LINKS = environment.o crc32.o
-OBJ_FILES = img2srec.o mkimage.o envcrc.o gen_eth_addr.o bmp_logo.o
+OBJ_LINKS = environment.o crc32.o sha1.o
+OBJ_FILES = img2srec.o mkimage.o envcrc.o ubsha1.o gen_eth_addr.o bmp_logo.o
ifeq ($(ARCH),mips)
BIN_FILES += inca-swap-bytes$(SFX)
all: $(obj).depend $(BINS) $(LOGO_H) subdirs
-$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)environment.o
+$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)environment.o $(obj)sha1.o
+ $(CC) $(CFLAGS) -o $@ $^
+
+$(obj)ubsha1$(SFX): $(obj)ubsha1.o $(obj)sha1.o
$(CC) $(CFLAGS) -o $@ $^
$(obj)img2srec$(SFX): $(obj)img2srec.o
$(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
$(STRIP) $@
-$(obj)mkimage$(SFX): $(obj)mkimage.o $(obj)crc32.o
+$(obj)mkimage$(SFX): $(obj)mkimage.o $(obj)crc32.o $(obj)sha1.o
$(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
$(STRIP) $@
$(obj)envcrc.o: $(src)envcrc.c
$(CC) -g $(CFLAGS) -c -o $@ $<
+$(obj)ubsha1.o: $(src)ubsha1.c
+ $(CC) -g $(CFLAGS) -c -o $@ $<
+
$(obj)crc32.o: $(obj)crc32.c
$(CC) -g $(CFLAGS) -c -o $@ $<
+$(obj)sha1.o: $(obj)sha1.c
+ $(CC) -g $(CFLAGS) -c -o $@ $<
+
$(obj)mkimage.o: $(src)mkimage.c
$(CC) -g $(CFLAGS) -c -o $@ $<
@rm -f $(obj)crc32.c
ln -s $(src)../lib_generic/crc32.c $(obj)crc32.c
+$(obj)sha1.c:
+ @rm -f $(obj)sha1.c
+ ln -s $(src)../lib_generic/sha1.c $(obj)sha1.c
+
$(LOGO_H): $(obj)bmp_logo $(LOGO_BMP)
$(obj)./bmp_logo $(LOGO_BMP) >$@
--- /dev/null
+/*
+ * (C) Copyright 2007
+ * Heiko Schocher, DENX Software Engineering, <hs@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <string.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include "sha1.h"
+
+#ifndef __ASSEMBLY__
+#define __ASSEMBLY__ /* Dirty trick to get only #defines */
+#endif
+#include <config.h>
+#undef __ASSEMBLY__
+
+#ifndef O_BINARY /* should be define'd on __WIN32__ */
+#define O_BINARY 0
+#endif
+
+#ifndef MAP_FAILED
+#define MAP_FAILED (-1)
+#endif
+
+extern int errno;
+
+extern void sha1_csum (unsigned char *input, int ilen, unsigned char output[20]);
+
+int main (int argc, char **argv)
+{
+ unsigned char output[20];
+ int i, len;
+
+ char *imagefile;
+ char *cmdname = *argv;
+ unsigned char *ptr;
+ unsigned char *data;
+ struct stat sbuf;
+ unsigned char *ptroff;
+ int ifd;
+ int off;
+
+ if (argc > 1) {
+ imagefile = argv[1];
+ ifd = open (imagefile, O_RDWR|O_BINARY);
+ if (ifd < 0) {
+ fprintf (stderr, "%s: Can't open %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+ if (fstat (ifd, &sbuf) < 0) {
+ fprintf (stderr, "%s: Can't stat %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+ len = sbuf.st_size;
+ ptr = (unsigned char *)mmap(0, len,
+ PROT_READ, MAP_SHARED, ifd, 0);
+ if (ptr == (unsigned char *)MAP_FAILED) {
+ fprintf (stderr, "%s: Can't read %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+
+ /* create a copy, so we can blank out the sha1 sum */
+ data = malloc (len);
+ memcpy (data, ptr, len);
+ off = SHA1_SUM_POS;
+ ptroff = &data[len + off];
+ for (i = 0; i < SHA1_SUM_LEN; i++) {
+ ptroff[i] = 0;
+ }
+
+ sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
+
+ printf ("U-Boot sum:\n");
+ for (i = 0; i < 20 ; i++) {
+ printf ("%02X ", output[i]);
+ }
+ printf ("\n");
+ /* overwrite the sum in the bin file, with the actual */
+ lseek (ifd, SHA1_SUM_POS, SEEK_END);
+ if (write (ifd, output, SHA1_SUM_LEN) != SHA1_SUM_LEN) {
+ fprintf (stderr, "%s: Can't write %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+
+ free (data);
+ (void) munmap((void *)ptr, len);
+ (void) close (ifd);
+ }
+
+ return EXIT_SUCCESS;
+}
projects / oweals / u-boot.git / commitdiff