powerpc/85xx: Add some defines for P2040, P3041, P5010, P5020
authorKumar Gala <galak@kernel.crashing.org>
Tue, 25 Jan 2011 18:42:32 +0000 (12:42 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 4 Apr 2011 14:24:40 +0000 (09:24 -0500)
Specify the number of DDR controllers, number of frame managers, number
of 1g and 10g ports.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/include/asm/config_mpc85xx.h

index 6c16681b7f320a9c1179d0b8cf694ff53bb54878..53703f65665356c50a2c6e2b612da66c00f27b47 100644 (file)
 #define CONFIG_MAX_CPUS                        4
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
+#define CONFIG_SYS_NUM_FMAN            1
+#define CONFIG_SYS_NUM_FM1_DTSEC       5
+#define CONFIG_NUM_DDR_CONTROLLERS     1
 
 #elif defined(CONFIG_PPC_P3041)
 #define CONFIG_MAX_CPUS                        4
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
+#define CONFIG_SYS_NUM_FMAN            1
+#define CONFIG_SYS_NUM_FM1_DTSEC       5
+#define CONFIG_SYS_NUM_FM1_10GEC       1
+#define CONFIG_NUM_DDR_CONTROLLERS     1
 
 #elif defined(CONFIG_PPC_P4040)
 #define CONFIG_MAX_CPUS                        4
 #define CONFIG_MAX_CPUS                        1
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
+#define CONFIG_SYS_NUM_FMAN            1
+#define CONFIG_SYS_NUM_FM1_DTSEC       5
+#define CONFIG_SYS_NUM_FM1_10GEC       1
+#define CONFIG_NUM_DDR_CONTROLLERS     1
 
 #elif defined(CONFIG_PPC_P5020)
 #define CONFIG_MAX_CPUS                        2
 #define CONFIG_SYS_FSL_NUM_LAWS                32
 #define CONFIG_SYS_FSL_SEC_COMPAT      4
+#define CONFIG_SYS_NUM_FMAN            1
+#define CONFIG_SYS_NUM_FM1_DTSEC       5
+#define CONFIG_SYS_NUM_FM1_10GEC       1
+#define CONFIG_NUM_DDR_CONTROLLERS     2
 
 #else
 #error Processor type not defined for this platform