STANDALONE_LOAD_ADDR = 0x1000 -m elf32bfin
+ifeq ($(CONFIG_BFIN_CPU),)
+CONFIG_BFIN_CPU := \
+ $(shell awk '$$2 == "CONFIG_BFIN_CPU" { print $$3 }' \
+ $(src)include/configs/$(BOARD).h)
+else
+CONFIG_BFIN_CPU := $(strip $(subst ",,$(CONFIG_BFIN_CPU)))
+endif
CONFIG_BFIN_BOOT_MODE := $(strip $(subst ",,$(CONFIG_BFIN_BOOT_MODE)))
PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic
LDFLAGS += -m elf32bfin
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
-PLATFORM_CPPFLAGS += -DBFIN_CPU='"$(CONFIG_BFIN_CPU)"'
PLATFORM_RELFLAGS += -mcpu=$(CONFIG_BFIN_CPU)
ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS)
/* Some of our defines use this (like CONFIG_SYS_GBL_DATA_ADDR) */
#include <asm-offsets.h>
+/* Sanity check CONFIG_BFIN_CPU */
+#ifndef CONFIG_BFIN_CPU
+# error CONFIG_BFIN_CPU: your board config needs to define this
+#endif
+
#ifndef CONFIG_BFIN_SCRATCH_REG
# define CONFIG_BFIN_SCRATCH_REG retn
#endif
memset((void *)bd, 0, sizeof(bd_t));
bd->bi_r_version = version_string;
- bd->bi_cpu = BFIN_CPU;
+ bd->bi_cpu = MK_STR(CONFIG_BFIN_CPU);
bd->bi_board_name = BFIN_BOARD_NAME;
bd->bi_vco = get_vco();
bd->bi_cclk = get_cclk();
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf536-0.3
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf518-0.0
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf526-0.0
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf527-0.2
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf527-0.0
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf527-0.2
-
CFLAGS_lib_generic += -O2
CFLAGS_lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf533-0.3
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf533-0.3
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf537-0.2
-
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf537-0.2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf537-0.2
-
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf537-0.2
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf538-0.4
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf548-0.0
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf561-0.5
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf561-0.3
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf532-0.5
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-
-CONFIG_BFIN_CPU = bf561-0.5
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf527-0.0
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf533-0.3
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf537-0.2
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf537-0.2
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf548-0.0
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf561-0.3
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf561-0.5
-
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf532-0.5
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf518-0.0
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
# MA 02111-1307 USA
#
-CONFIG_BFIN_CPU = bf537-0.2
-
CFLAGS_lib += -O2
CFLAGS_lib/lzma += -O2
/*
* Processor Settings
*/
-#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
+#define CONFIG_BFIN_CPU bf536-0.3
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf518-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf526-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf538-0.4
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
-#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
+#define CONFIG_BFIN_CPU bf561-0.5
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf561-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/* CPU Options
* Be sure to set the Silicon Revision Correctly
*/
+#define CONFIG_BFIN_CPU bf532-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
#define CONFIG_PANIC_HANG 0
/* CPU Options */
-#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
+#define CONFIG_BFIN_CPU bf561-0.5
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
/*
* CLOCK SETTINGS CAVEAT
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf548-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf561-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf561-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf532-0.5
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_NAND
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf518-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Processor Settings
*/
+#define CONFIG_BFIN_CPU bf537-0.2
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS