powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines
authorHeiko Schocher <hs@denx.de>
Wed, 19 Nov 2008 09:10:30 +0000 (10:10 +0100)
committerKim Phillips <kim.phillips@freescale.com>
Thu, 20 Nov 2008 00:43:09 +0000 (18:43 -0600)
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
include/mpc83xx.h

index a2c0ed9e0c6581f84d75bf2a9c93db9fbc120a68..43553f5ae653c9516e1a2c654d7321a29c519edc 100644 (file)
 #define TIMING_CFG1_WRTORD_SHIFT       0
 #define TIMING_CFG1_CASLAT_20          0x00030000      /* CAS latency = 2.0 */
 #define TIMING_CFG1_CASLAT_25          0x00040000      /* CAS latency = 2.5 */
-#define TIMING_CFG1_CASLAT_30          0x00050000      /* CAS latency = 2.5 */
+#define TIMING_CFG1_CASLAT_30          0x00050000      /* CAS latency = 3.0 */
+#define TIMING_CFG1_CASLAT_35          0x00060000      /* CAS latency = 3.5 */
+#define TIMING_CFG1_CASLAT_40          0x00070000      /* CAS latency = 4.0 */
 
 /* TIMING_CFG_2 - DDR SDRAM Timing Configuration 2
  */