rockchip: reserve memory for rk3399 ATF data
authorKever Yang <kever.yang@rock-chips.com>
Thu, 20 Apr 2017 09:03:46 +0000 (17:03 +0800)
committerSimon Glass <sjg@chromium.org>
Wed, 10 May 2017 19:37:21 +0000 (13:37 -0600)
There are 3 regions used by rk3399 ATF:
- bl31 code, located at 0x10000;
- cortex-m0 code and data, located at 0xff8c0000;
- bl31 data, located at 0xff8c1000 ~ 0xff8c4000;

SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory
for ATF data, or else there will be memory corrupt after SPL
loads the ATF image.

More detail about cortex-M0 code in ATF:
https://github.com/ARM-software/arm-trusted-firmware/commit/
8382e17c4c6bffd15119dfce1ee4372e3c1a7890

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/arm/include/asm/arch-rockchip/boot0.h
arch/arm/mach-rockchip/Kconfig

index 8d7bc9a909369a8b30d003d33cb02eed1d9e33e3..7346876dc21a486b4ea2e07fbb603c1e5b57c115 100644 (file)
@@ -16,3 +16,7 @@
        .space 0x4         /* space for the 'RK33' */
 #endif
        b reset
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+       .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
+#endif
index 2b752ad5cadd6430281dfad4f88383483f5f3bdf..740dbdf70e3ae4aa57202866aac1728b76a84cbe 100644 (file)
@@ -74,6 +74,14 @@ config ROCKCHIP_SPL_BACK_TO_BROM
           SPL will return to the boot rom, which will then load the U-Boot
           binary to keep going on.
 
+config ROCKCHIP_SPL_RESERVE_IRAM
+       hex "Size of IRAM reserved in SPL"
+       default 0x4000
+       help
+         SPL may need reserve memory for firmware loaded by SPL, whose load
+         address is in IRAM and may overlay with SPL text area if not
+         reserved.
+
 config ROCKCHIP_BROM_HELPER
        bool