ARM: OMAP4/5: Make OMAPx_SRAM_SCRATCH_ defines common

These defines are same across OMAP4/5. So move them to
omap_common.h. This is required for the patches that
follow.

Signed-off-by: Sricharan R <r.sricharan@ti.com>

diff --git a/arch/arm/cpu/armv7/omap4/emif.c b/arch/arm/cpu/armv7/omap4/emif.c
index 53f60635b195b2473df814117409545f55402f8a..0ddf35f79bdfc0df0a03c9de69b3d04665e7d3fd 100644 (file)
--- a/arch/arm/cpu/armv7/omap4/emif.c
+++ b/arch/arm/cpu/armv7/omap4/emif.c
@@ -31,8 +31,8 @@
 #include <asm/utils.h>
 
 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-u32 *const T_num = (u32 *)OMAP4_SRAM_SCRATCH_EMIF_T_NUM;
-u32 *const T_den = (u32 *)OMAP4_SRAM_SCRATCH_EMIF_T_DEN;
+u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;
+u32 *const T_den = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_DEN;
 #endif
 
 #ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS

diff --git a/arch/arm/cpu/armv7/omap4/hw_data.c b/arch/arm/cpu/armv7/omap4/hw_data.c
index 04977b4f2b2c4de5bb9a9af56b844926465fb4d5..06a2fc8c2f98bb1ecb202bf2f9a572b33bf21a15 100644 (file)
--- a/arch/arm/cpu/armv7/omap4/hw_data.c
+++ b/arch/arm/cpu/armv7/omap4/hw_data.c
@@ -40,7 +40,7 @@ struct dplls const **dplls_data =
 struct vcores_data const **omap_vcores =
                (struct vcores_data const **) OMAP_SRAM_SCRATCH_VCORES_PTR;
 struct omap_sys_ctrl_regs const **ctrl =
-       (struct omap_sys_ctrl_regs const **)OMAP4_SRAM_SCRATCH_SYS_CTRL;
+       (struct omap_sys_ctrl_regs const **)OMAP_SRAM_SCRATCH_SYS_CTRL;
 
 /*
  * The M & N values in the following tables are created using the

diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c
index 2db517b1bf531e19cce1dd77c31bdb363c9c3b71..81f5a48e509ab2202cddc02c30c7519447e61043 100644 (file)
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -34,10 +34,11 @@
 #include <asm/sizes.h>
 #include <asm/emif.h>
 #include <asm/arch/gpio.h>
+#include <asm/omap_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-u32 *const omap_si_rev = (u32 *)OMAP4_SRAM_SCRATCH_OMAP4_REV;
+u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
 
 static const struct gpio_bank gpio_bank_44xx[6] = {
        { (void *)OMAP44XX_GPIO1_BASE, METHOD_GPIO_24XX },

diff --git a/arch/arm/cpu/armv7/omap5/emif.c b/arch/arm/cpu/armv7/omap5/emif.c
index 3f37abdf83b735d0d9535cb3e8594b7de34ad557..b4c1319adcca2277fdc8bf44f2d607e5d46788fb 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/emif.c
+++ b/arch/arm/cpu/armv7/omap5/emif.c
@@ -32,8 +32,8 @@
 
 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
 #define print_timing_reg(reg) debug(#reg" - 0x%08x\n", (reg))
-static u32 *const T_num = (u32 *)OMAP5_SRAM_SCRATCH_EMIF_T_NUM;
-static u32 *const T_den = (u32 *)OMAP5_SRAM_SCRATCH_EMIF_T_DEN;
+static u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;
+static u32 *const T_den = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_DEN;
 #endif
 
 #ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 56988769608bc800e72e53484d6a192f1eded433..604fa42b1b6a035851a6c4fb0f705cff132d648b 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -41,7 +41,7 @@ struct dplls const **dplls_data =
 struct vcores_data const **omap_vcores =
                (struct vcores_data const **) OMAP_SRAM_SCRATCH_VCORES_PTR;
 struct omap_sys_ctrl_regs const **ctrl =
-       (struct omap_sys_ctrl_regs const **)OMAP5_SRAM_SCRATCH_SYS_CTRL;
+       (struct omap_sys_ctrl_regs const **)OMAP_SRAM_SCRATCH_SYS_CTRL;
 
 /* OPP HIGH FREQUENCY for ES2.0 */
 static const struct dpll_params mpu_dpll_params_1_5ghz[NUM_SYS_CLKS] = {

diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index d29df787206e0489874d838038fee17e1779b790..e192fea0ebccfd141bc37346f2f8e975003c74f4 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -37,10 +37,11 @@
 #include <asm/utils.h>
 #include <asm/arch/gpio.h>
 #include <asm/emif.h>
+#include <asm/omap_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-u32 *const omap_si_rev = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV;
+u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
 
 static struct gpio_bank gpio_bank_54xx[6] = {
        { (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 9ad1e821ec9f8b776ba56d78f8477f8555b78d84..e9a6ffeb831fa3b4db93f59a321362a37a319e9c 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -143,16 +143,4 @@ struct s32ktimer {
 #define NON_SECURE_SRAM_END    0x4030E000      /* Not inclusive */
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE     0x4030D000
-/* Temporary SRAM stack used while low level init is done */
-#define SRAM_SCRATCH_SPACE_ADDR                NON_SECURE_SRAM_START
-/* SRAM scratch space entries */
-#define OMAP4_SRAM_SCRATCH_OMAP4_REV   SRAM_SCRATCH_SPACE_ADDR
-#define OMAP4_SRAM_SCRATCH_EMIF_T_NUM  (SRAM_SCRATCH_SPACE_ADDR + 0xC)
-#define OMAP4_SRAM_SCRATCH_EMIF_T_DEN  (SRAM_SCRATCH_SPACE_ADDR + 0x10)
-#define OMAP_SRAM_SCRATCH_PRCM_PTR      (SRAM_SCRATCH_SPACE_ADDR + 0x14)
-#define OMAP_SRAM_SCRATCH_DPLLS_PTR     (SRAM_SCRATCH_SPACE_ADDR + 0x18)
-#define OMAP_SRAM_SCRATCH_VCORES_PTR   (SRAM_SCRATCH_SPACE_ADDR + 0x1C)
-#define OMAP4_SRAM_SCRATCH_SYS_CTRL    (SRAM_SCRATCH_SPACE_ADDR + 0x20)
-#define OMAP4_SRAM_SCRATCH_SPACE_END   (SRAM_SCRATCH_SPACE_ADDR + 0x24)
-
 #endif

diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 3bf5afae1a65e6326d0c8fd48a2a13038a79d82f..4f43a903d84843d6c64bd0ae0fd3a69f179b816a 100644 (file)
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -191,19 +191,6 @@ struct s32ktimer {
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE     0x4031F000
 
-#define SRAM_SCRATCH_SPACE_ADDR                NON_SECURE_SRAM_START
-/*
- * SRAM scratch space entries
- */
-#define OMAP5_SRAM_SCRATCH_OMAP5_REV   SRAM_SCRATCH_SPACE_ADDR
-#define OMAP5_SRAM_SCRATCH_EMIF_T_NUM  (SRAM_SCRATCH_SPACE_ADDR + 0xC)
-#define OMAP5_SRAM_SCRATCH_EMIF_T_DEN  (SRAM_SCRATCH_SPACE_ADDR + 0x10)
-#define OMAP_SRAM_SCRATCH_PRCM_PTR      (SRAM_SCRATCH_SPACE_ADDR + 0x14)
-#define OMAP_SRAM_SCRATCH_DPLLS_PTR     (SRAM_SCRATCH_SPACE_ADDR + 0x18)
-#define OMAP_SRAM_SCRATCH_VCORES_PTR    (SRAM_SCRATCH_SPACE_ADDR + 0x1C)
-#define OMAP5_SRAM_SCRATCH_SYS_CTRL    (SRAM_SCRATCH_SPACE_ADDR + 0x20)
-#define OMAP5_SRAM_SCRATCH_SPACE_END   (SRAM_SCRATCH_SPACE_ADDR + 0x24)
-
 /* Silicon revisions */
 #define OMAP4430_SILICON_ID_INVALID    0xFFFFFFFF
 #define OMAP4430_ES1_0 0x44300100

diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 6d377d5b5962ffc7095a2b8a3a4ce3b6aa9572be..837b69fdabe79c0f35bbff8382b7b775b3074a5c 100644 (file)
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -584,4 +584,18 @@ static inline u32 omap_revision(void)
 
 /* DRA7XX */
 #define DRA752_ES1_0   0x07520100
+
+/*
+ * SRAM scratch space entries
+ */
+#define SRAM_SCRATCH_SPACE_ADDR                NON_SECURE_SRAM_START
+#define OMAP_SRAM_SCRATCH_OMAP_REV     SRAM_SCRATCH_SPACE_ADDR
+#define OMAP_SRAM_SCRATCH_EMIF_SIZE    (SRAM_SCRATCH_SPACE_ADDR + 0x4)
+#define OMAP_SRAM_SCRATCH_EMIF_T_NUM   (SRAM_SCRATCH_SPACE_ADDR + 0xC)
+#define OMAP_SRAM_SCRATCH_EMIF_T_DEN   (SRAM_SCRATCH_SPACE_ADDR + 0x10)
+#define OMAP_SRAM_SCRATCH_PRCM_PTR      (SRAM_SCRATCH_SPACE_ADDR + 0x14)
+#define OMAP_SRAM_SCRATCH_DPLLS_PTR     (SRAM_SCRATCH_SPACE_ADDR + 0x18)
+#define OMAP_SRAM_SCRATCH_VCORES_PTR    (SRAM_SCRATCH_SPACE_ADDR + 0x1C)
+#define OMAP_SRAM_SCRATCH_SYS_CTRL     (SRAM_SCRATCH_SPACE_ADDR + 0x20)
+#define OMAP_SRAM_SCRATCH_SPACE_END    (SRAM_SCRATCH_SPACE_ADDR + 0x24)
 #endif /* _OMAP_COMMON_H_ */