#include <linux/soc/ti/ti_sci_protocol.h>
#include <fdt_support.h>
#include <asm/arch/sys_proto.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
struct ti_sci_handle *get_ti_sci_handle(void)
{
{
}
#endif
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+int print_cpuinfo(void)
+{
+ u32 soc, rev;
+ char *name;
+
+ soc = (readl(CTRLMMR_WKUP_JTAG_DEVICE_ID) &
+ DEVICE_ID_FAMILY_MASK) >> DEVICE_ID_FAMILY_SHIFT;
+ rev = (readl(CTRLMMR_WKUP_JTAG_ID) &
+ JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
+
+ printf("SoC: ");
+ switch (soc) {
+ case AM654:
+ name = "AM654";
+ break;
+ case J721E:
+ name = "J721E";
+ break;
+ default:
+ name = "Unknown Silicon";
+ };
+
+ printf("%s PG ", name);
+ switch (rev) {
+ case REV_PG1_0:
+ name = "1.0";
+ break;
+ case REV_PG2_0:
+ name = "2.0";
+ break;
+ default:
+ name = "Unknown Revision";
+ };
+ printf("%s\n", name);
+
+ return 0;
+}
+#endif
#ifdef CONFIG_SOC_K3_J721E
#include "j721e_hardware.h"
#endif
+
+/* Assuming these addresses and definitions stay common across K3 devices */
+#define CTRLMMR_WKUP_JTAG_DEVICE_ID 0x43000018
+#define DEVICE_ID_FAMILY_SHIFT 26
+#define DEVICE_ID_FAMILY_MASK (0x3f << 26)
+#define DEVICE_ID_BASE_SHIFT 11
+#define DEVICE_ID_BASE_MASK (0x1fff << 11)
+#define DEVICE_ID_SPEED_SHIFT 6
+#define DEVICE_ID_SPEED_MASK (0x1f << 6)
+#define DEVICE_ID_TEMP_SHIFT 3
+#define DEVICE_ID_TEMP_MASK (0x7 << 3)
+
+#define CTRLMMR_WKUP_JTAG_ID 0x43000014
+#define JTAG_ID_VARIANT_SHIFT 28
+#define JTAG_ID_VARIANT_MASK (0xf << 28)
+#define JTAG_ID_PARTNO_SHIFT 12
+#define JTAG_ID_PARTNO_MASK (0x7ff << 1)
+
#endif /* _ASM_ARCH_HARDWARE_H_ */