armv8: ls1043ardb: Add TFABOOT support

TFABOOT support includes:
 - ls1043ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - FMAN and QE address changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS
index 88fe42e1e8a3f80b6b8f9f082a485b908b2b4246..3f64a6fc02c7d62149e0f09fe23e420545de5c56 100644 (file)
--- a/board/freescale/ls1043ardb/MAINTAINERS
+++ b/board/freescale/ls1043ardb/MAINTAINERS
@@ -1,5 +1,6 @@
 LS1043A BOARD
 M:     Mingkai Hu <mingkai.hu@nxp.com>
+M:     Rajesh Bhagat <rajesh.bhagat@nxp.com>
 S:     Maintained
 F:     board/freescale/ls1043ardb/
 F:     board/freescale/ls1043ardb/ls1043ardb.c
@@ -7,6 +8,7 @@ F:      include/configs/ls1043ardb.h
 F:     configs/ls1043ardb_defconfig
 F:     configs/ls1043ardb_nand_defconfig
 F:     configs/ls1043ardb_sdcard_defconfig
+F:     configs/ls1043ardb_tfa_defconfig
 
 LS1043A_SECURE_BOOT BOARD
 M:     Ruchika Gupta <ruchika.gupta@nxp.com>

diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c
index 7bc0f568ffbe90e1691a51415aab84b87291ba60..784e482f32fb3b8213b034df73eea518ffc8e617 100644 (file)
--- a/board/freescale/ls1043ardb/ddr.c
+++ b/board/freescale/ls1043ardb/ddr.c
@@ -205,6 +205,19 @@ phys_size_t fixed_sdram(void)
 }
 #endif
 
+#ifdef CONFIG_TFABOOT
+int fsl_initdram(void)
+{
+       gd->ram_size = tfa_get_dram_size();
+       if (!gd->ram_size)
+#ifdef CONFIG_SYS_DDR_RAW_TIMING
+               gd->ram_size = fsl_ddr_sdram_size();
+#else
+               gd->ram_size = 0x80000000;
+#endif
+               return 0;
+}
+#else
 int fsl_initdram(void)
 {
        phys_size_t dram_size;
@@ -236,3 +249,4 @@ int fsl_initdram(void)
 
        return 0;
 }
+#endif

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index f31f0ec515dc7a19c2ed477a1eb329f160cfb3fc..fbd9a2691b88ee9c360235ed1e1033c45880af39 100644 (file)
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -27,6 +27,104 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_TFABOOT
+struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+       {
+               "nor",
+               CONFIG_SYS_NOR_CSPR,
+               CONFIG_SYS_NOR_CSPR_EXT,
+               CONFIG_SYS_NOR_AMASK,
+               CONFIG_SYS_NOR_CSOR,
+               {
+                       CONFIG_SYS_NOR_FTIM0,
+                       CONFIG_SYS_NOR_FTIM1,
+                       CONFIG_SYS_NOR_FTIM2,
+                       CONFIG_SYS_NOR_FTIM3
+               },
+
+       },
+       {
+               "nand",
+               CONFIG_SYS_NAND_CSPR,
+               CONFIG_SYS_NAND_CSPR_EXT,
+               CONFIG_SYS_NAND_AMASK,
+               CONFIG_SYS_NAND_CSOR,
+               {
+                       CONFIG_SYS_NAND_FTIM0,
+                       CONFIG_SYS_NAND_FTIM1,
+                       CONFIG_SYS_NAND_FTIM2,
+                       CONFIG_SYS_NAND_FTIM3
+               },
+       },
+       {
+               "cpld",
+               CONFIG_SYS_CPLD_CSPR,
+               CONFIG_SYS_CPLD_CSPR_EXT,
+               CONFIG_SYS_CPLD_AMASK,
+               CONFIG_SYS_CPLD_CSOR,
+               {
+                       CONFIG_SYS_CPLD_FTIM0,
+                       CONFIG_SYS_CPLD_FTIM1,
+                       CONFIG_SYS_CPLD_FTIM2,
+                       CONFIG_SYS_CPLD_FTIM3
+               },
+       }
+};
+
+struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+       {
+               "nand",
+               CONFIG_SYS_NAND_CSPR,
+               CONFIG_SYS_NAND_CSPR_EXT,
+               CONFIG_SYS_NAND_AMASK,
+               CONFIG_SYS_NAND_CSOR,
+               {
+                       CONFIG_SYS_NAND_FTIM0,
+                       CONFIG_SYS_NAND_FTIM1,
+                       CONFIG_SYS_NAND_FTIM2,
+                       CONFIG_SYS_NAND_FTIM3
+               },
+       },
+       {
+               "nor",
+               CONFIG_SYS_NOR_CSPR,
+               CONFIG_SYS_NOR_CSPR_EXT,
+               CONFIG_SYS_NOR_AMASK,
+               CONFIG_SYS_NOR_CSOR,
+               {
+                       CONFIG_SYS_NOR_FTIM0,
+                       CONFIG_SYS_NOR_FTIM1,
+                       CONFIG_SYS_NOR_FTIM2,
+                       CONFIG_SYS_NOR_FTIM3
+               },
+       },
+       {
+               "cpld",
+               CONFIG_SYS_CPLD_CSPR,
+               CONFIG_SYS_CPLD_CSPR_EXT,
+               CONFIG_SYS_CPLD_AMASK,
+               CONFIG_SYS_CPLD_CSOR,
+               {
+                       CONFIG_SYS_CPLD_FTIM0,
+                       CONFIG_SYS_CPLD_FTIM1,
+                       CONFIG_SYS_CPLD_FTIM2,
+                       CONFIG_SYS_CPLD_FTIM3
+               },
+       }
+};
+
+void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
+{
+       enum boot_src src = get_boot_src();
+
+       if (src == BOOT_SOURCE_IFC_NAND)
+               regs_info->regs = ifc_cfg_nand_boot;
+       else
+               regs_info->regs = ifc_cfg_nor_boot;
+       regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
+}
+
+#endif
 int board_early_init_f(void)
 {
        fsl_lsch2_early_init_f();
@@ -38,6 +136,9 @@ int board_early_init_f(void)
 
 int checkboard(void)
 {
+#ifdef CONFIG_TFABOOT
+       enum boot_src src = get_boot_src();
+#endif
        static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
 #ifndef CONFIG_SD_BOOT
        u8 cfg_rcw_src1, cfg_rcw_src2;
@@ -47,6 +148,12 @@ int checkboard(void)
 
        printf("Board: LS1043ARDB, boot from ");
 
+#ifdef CONFIG_TFABOOT
+       if (src == BOOT_SOURCE_SD_MMC)
+               puts("SD\n");
+       else {
+#endif
+
 #ifdef CONFIG_SD_BOOT
        puts("SD\n");
 #else
@@ -64,6 +171,9 @@ int checkboard(void)
                printf("Invalid setting of SW4\n");
 #endif
 
+#ifdef CONFIG_TFABOOT
+       }
+#endif
        printf("CPLD:  V%x.%x\nPCBA:  V%x.0\n", CPLD_READ(cpld_ver),
               CPLD_READ(cpld_ver_sub), CPLD_READ(pcba_ver));
 

diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
new file mode 100644 (file)
index 0000000..0ad9db7
--- /dev/null
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=10
+CONFIG_TFABOOT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DM=y
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_FSL_CAAM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_SOFTWARE_EXP=y

diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
new file mode 100644 (file)
index 0000000..662a966
--- /dev/null
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -0,0 +1,52 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_TFABOOT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y

diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 4279d535497a6588c6781420d472e9cb3d38e3af..27350dfa00f0111ead3becbe31c6b93bae04b7b3 100644 (file)
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -33,7 +33,11 @@
 #include <asm/arch/config.h>
 
 /* Link Definitions */
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SYS_TEXT_BASE
+#else
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
+#endif
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -119,7 +123,8 @@
 
 /* IFC */
 #ifndef SPL_NO_IFC
-#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
+#if defined(CONFIG_TFABOOT) || \
+       (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
 #define CONFIG_FSL_IFC
 /*
  * CONFIG_SYS_FLASH_BASE has the final address (core view)
@@ -182,6 +187,16 @@
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_FM_MURAM_SIZE       0x60000
 
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_FMAN_FW_ADDR                0x900000
+#define CONFIG_SYS_QE_FW_ADDR          0x940000
+
+#define CONFIG_ENV_SPI_BUS             0
+#define CONFIG_ENV_SPI_CS              0
+#define CONFIG_ENV_SPI_MAX_HZ          1000000
+#define CONFIG_ENV_SPI_MODE            0x03
+
+#else
 #ifdef CONFIG_NAND_BOOT
 /* Store Fman ucode at offeset 0x900000(72 blocks). */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
@@ -208,6 +223,7 @@
 #define CONFIG_SYS_FMAN_FW_ADDR                0x60900000
 #define CONFIG_SYS_QE_FW_ADDR          0x60940000
 #endif
+#endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
 #define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 #endif
@@ -300,6 +316,14 @@
 
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "  \
+                          "env exists secureboot && esbc_halt;"
+#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "  \
+                          "env exists secureboot && esbc_halt;"
+#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "    \
+                          "env exists secureboot && esbc_halt;"
+#else
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "    \
                           "env exists secureboot && esbc_halt;"
@@ -311,6 +335,7 @@
                           "env exists secureboot && esbc_halt;"
 #endif
 #endif
+#endif
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */

diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 54e6eef417beed5ee7da671831a4cee239e5881f..a0d39878b85e59940d22ced906a82d1f088f6675 100644 (file)
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -162,6 +162,25 @@
 #define CONFIG_SYS_CPLD_FTIM3          0x0
 
 /* IFC Timing Params */
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+
+#define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NAND_CSPR_EXT
+#define CONFIG_SYS_CSPR1               CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK1              CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR1               CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NAND_FTIM3
+#else
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
@@ -199,6 +218,7 @@
 #define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NAND_FTIM3
 #endif
+#endif
 
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_CPLD_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_CPLD_CSPR
@@ -227,6 +247,14 @@
 #define CONFIG_ENV_OVERWRITE
 #endif
 
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_MMC_ENV_DEV         0
+
+#define CONFIG_ENV_SIZE                        0x2000
+#define CONFIG_ENV_OFFSET              0x500000
+#define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x500000)
+#define CONFIG_ENV_SECT_SIZE           0x20000
+#else
 #if defined(CONFIG_NAND_BOOT)
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_ENV_OFFSET              (24 * CONFIG_SYS_NAND_BLOCK_SIZE)
@@ -239,6 +267,7 @@
 #define CONFIG_ENV_SECT_SIZE           0x20000
 #define CONFIG_ENV_SIZE                        0x20000
 #endif
+#endif
 
 /* FMan */
 #ifndef SPL_NO_FMAN