arm:exynos:fix: Fix clock calculation for Exynos4210 based targets.
authorŁukasz Majewski <l.majewski@samsung.com>
Fri, 12 Jul 2013 17:08:25 +0000 (19:08 +0200)
committerTom Rini <trini@ti.com>
Tue, 16 Jul 2013 13:20:16 +0000 (09:20 -0400)
Provide proper setting for the APLL fout frequency calculation for
Exynos4 based targets (especially Exynos4210 - Trats board).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
arch/arm/cpu/armv7/exynos/clock.c

index 9f07181988626e416b73ca192a6390f50591fd38..5a5cfa1d36a30e850fc49b157978cef1b3ef727d 100644 (file)
@@ -141,18 +141,17 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
                fout = (m + k / div) * (freq / (p * (1 << s)));
        } else {
                /*
-                * Exynos4210
+                * Exynos4412 / Exynos5250
                 * FOUT = MDIV * FIN / (PDIV * 2^SDIV)
                 *
-                * Exynos4412 / Exynos5250
+                * Exynos4210
                 * FOUT = MDIV * FIN / (PDIV * 2^(SDIV-1))
                 */
                if (proid_is_exynos4210())
-                       fout = m * (freq / (p * (1 << s)));
-               else
                        fout = m * (freq / (p * (1 << (s - 1))));
+               else
+                       fout = m * (freq / (p * (1 << s)));
        }
-
        return fout;
 }