The DDR memory from 0x88000000 to 0x8FFFFFFF is assigned to M4 on
QM and QXP. The M4 can allocate this memory by two ways,
in SCD or u-boot.
In this patch, u-boot addes the memory reserve node to DTB to pass
the info to kernel, no matter the M4 memory is reserved in SCD
or u-boot. So kernel won't access M4 reserved memory.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is to specific the cfg file for generating container
image which will be loaded by SPL.
+config BOOTAUX_RESERVED_MEM_BASE
+ hex "i.MX auxiliary core dram memory base"
+ default 0
+
+config BOOTAUX_RESERVED_MEM_SIZE
+ hex "i.MX auxiliary core dram memory size"
+ default 0
+
choice
prompt "i.MX8 board select"
optional
#include <asm/arch/sys_proto.h>
#include <dm/ofnode.h>
#include <fdt_support.h>
+#include <linux/libfdt.h>
DECLARE_GLOBAL_DATA_PTR;
int ft_system_setup(void *blob, bd_t *bd)
{
int ret;
+ int off;
+
+ if (CONFIG_BOOTAUX_RESERVED_MEM_BASE) {
+ off = fdt_add_mem_rsv(blob, CONFIG_BOOTAUX_RESERVED_MEM_BASE,
+ CONFIG_BOOTAUX_RESERVED_MEM_SIZE);
+ if (off < 0)
+ printf("Failed to reserve memory for bootaux: %s\n",
+ fdt_strerror(off));
+ }
update_fdt_with_owned_resources(blob);