spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header
authorHeiko Schocher <hs@denx.de>
Fri, 31 Oct 2014 07:30:55 +0000 (08:30 +0100)
committerTom Rini <trini@ti.com>
Mon, 17 Nov 2014 13:47:16 +0000 (08:47 -0500)
move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h
and define a default value. Delete this define in the board
config files, where it is possible (all boards use currently
the same value).

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
14 files changed:
drivers/spi/atmel_spi.h
include/configs/afeb9260.h
include/configs/at91sam9260ek.h
include/configs/at91sam9261ek.h
include/configs/at91sam9263ek.h
include/configs/at91sam9rlek.h
include/configs/ethernut5.h
include/configs/meesc.h
include/configs/otc570.h
include/configs/pm9261.h
include/configs/pm9263.h
include/configs/sbc35_a9g20.h
include/configs/tny_a9260.h
include/configs/usb_a9263.h

index d2409454f9f9af025678142cd0ab5274546d26e8..1538a235a5fdef73fc01e3e773112dc6d83bce48 100644 (file)
@@ -94,3 +94,7 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave)
        readl(as->regs + ATMEL_SPI_##reg)
 #define spi_writel(as, reg, value)                             \
        writel(value, as->regs + ATMEL_SPI_##reg)
+
+#if !defined(CONFIG_SYS_SPI_WRITE_TOUT)
+#define CONFIG_SYS_SPI_WRITE_TOUT      (5 * CONFIG_SYS_HZ)
+#endif
index 14bac155a355e1570032ae7dedd8bc714a615306..932a3090b409b032b345260e60989a7c8c60a9bf 100644 (file)
@@ -77,7 +77,6 @@
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1    0xD0000000      /* CS1 */
index 0f6ef31e9a70de664505d4c3e56078ad313e9300..a6a80de88af419c1da403b7d96a8d4b746ecec59 100644 (file)
 #ifndef CONFIG_AT91SAM9G20EK_2MMC
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH           1
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1    0xD0000000      /* CS1 */
index 2cc0b8bf762f3aeb04a99c0174f0fb3caa979353..407a53e55596a4e397ad3221f484c1d24dde3948 100644 (file)
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3    0xD0000000      /* CS3 */
index b666d9494ddfc50469c85f743b064a676a87efb4..fa19e8bcc801d55a475a143727c2b02ffc2b470b 100644 (file)
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH           1
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define AT91_SPI_CLK                   15000000
index b8d5dd156f9f75a61ea7d921ff74b694dcc1d59b..d5f0197466176a7958c29b66cc361fcefadc4b5b 100644 (file)
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH                   1
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define AT91_SPI_CLK                           15000000
index 4c69af6af3f30da2d60994a3559e95426b8e3468..ce61a1621c08fe4c67c5c0694658afad099945d4 100644 (file)
@@ -78,7 +78,6 @@
 
 /* SPI */
 #define CONFIG_ATMEL_SPI
-#define CONFIG_SYS_SPI_WRITE_TOUT      (5 * CONFIG_SYS_HZ)
 #define AT91_SPI_CLK                   15000000
 
 /* Serial port */
index 86ce5f2397e0d515dee632b2e93bac9c78d029db..955d0e278ac6af19b86a72847a87358478ccee39 100644 (file)
 #ifdef CONFIG_SYS_USE_DATAFLASH
 # define CONFIG_ATMEL_DATAFLASH_SPI
 # define CONFIG_HAS_DATAFLASH
-# define CONFIG_SYS_SPI_WRITE_TOUT             (5 * CONFIG_SYS_HZ)
 # define CONFIG_SYS_MAX_DATAFLASH_BANKS                1
 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0   0xC0000000      /* CS0 */
 # define AT91_SPI_CLK                          15000000
index 629967d05499c6996fa628ad1b84afbb1f4e86c7..2390bebf917db6c075d1ce56dd5a806cbffe7738 100644 (file)
 #ifdef CONFIG_SYS_USE_DATAFLASH
 # define CONFIG_ATMEL_DATAFLASH_SPI
 # define CONFIG_HAS_DATAFLASH
-# define CONFIG_SYS_SPI_WRITE_TOUT             (5 * CONFIG_SYS_HZ)
 # define CONFIG_SYS_MAX_DATAFLASH_BANKS                1
 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0   0xC0000000      /* CS0 */
 # define AT91_SPI_CLK                          15000000
index 4a71927217c67a83a3dcdabfd068f4ac4d27b458..0746056d0acf2afc2461e9449b8f981d1cedf503 100644 (file)
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3    0xD0000000      /* CS3 */
index d9c04d14b96c027510dc61fb2b4f247b35ff4962..f0f12afb815072d1b3c2d661e4d5d444480b2ba1 100644 (file)
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH                   1
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define AT91_SPI_CLK                           15000000
index a1b5751d09573e33732c4fc397499d4dcaf53e60..e7c35eca39cd42c009864af4700958bed462cec4 100644 (file)
@@ -80,7 +80,6 @@
 #define CONFIG_SPI
 #define CONFIG_CMD_SPI
 #define CONFIG_ATMEL_SPI
-#define CONFIG_SYS_SPI_WRITE_TOUT      (5 * CONFIG_SYS_HZ)
 
 #define CONFIG_CMD_EEPROM
 #define CONFIG_SPI_M95XXX
index 32f6b00bbf9b6e236e35263636b8de0e9b06be98..79c7fc51293c4984c77004214b1349494ff5cbfc 100644 (file)
@@ -85,7 +85,6 @@
 #define CONFIG_SPI
 #define CONFIG_CMD_SPI
 #define CONFIG_ATMEL_SPI
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5 * CONFIG_SYS_HZ)
 
 #define CONFIG_CMD_EEPROM
 #define CONFIG_SPI_M95XXX
index 3c54870783d2cb78f252fbe25a2dd9938913cf9e..84571f6e938261bdc2eadca9035cc3e3187f7bb1 100644 (file)
@@ -85,7 +85,6 @@
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_SPI_WRITE_TOUT              (5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000
 #define AT91_SPI_CLK                           8000000