board: ge: bx50v3: Enable CONFIG_DM_MMC
authorIan Ray <ian.ray@ge.com>
Thu, 31 Jan 2019 14:21:12 +0000 (16:21 +0200)
committerStefano Babic <sbabic@denx.de>
Sat, 13 Apr 2019 18:30:08 +0000 (20:30 +0200)
Use MMC device model, and remove USDHC pin configuration code since the
pinctrl driver is used.

Signed-off-by: Ian Ray <ian.ray@ge.com>
arch/arm/dts/imx6q-bx50v3.dts
board/ge/bx50v3/bx50v3.c
configs/ge_bx50v3_defconfig
include/configs/ge_bx50v3.h

index 10b12998cd227666a3623270afb6bbe95e289653..0fff2195f985985a28314c42fce63414d026ef6c 100644 (file)
        model = "General Electric Bx50v3";
        compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
 };
+
+&iomuxc {
+       pinctrl-names = "default";
+
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
+                       MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
+                       MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
+                       MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
+                       MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
+                       MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
+                       MX6QDL_PAD_SD3_DAT4__SD3_DATA4  0x17059
+                       MX6QDL_PAD_SD3_DAT5__SD3_DATA5  0x17059
+                       MX6QDL_PAD_SD3_DAT6__SD3_DATA6  0x17059
+                       MX6QDL_PAD_SD3_DAT7__SD3_DATA7  0x17059
+               >;
+       };
+
+       pinctrl_usdhc3_reset: usdhc3grp-reset {
+               fsl,pins = <
+                       MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9
+               >;
+       };
+};
+
+&usdhc1 {
+       status = "disabled";
+};
+
+&usdhc2 {
+       status = "disabled";
+};
+
+/* eMMC */
+&usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
+       bus-width = <8>;
+       non-removable;
+       keep-power-in-suspend;
+       status = "okay";
+};
+
+&usdhc4 {
+       status = "disabled";
+};
index 079d302fbecc0230db7be42fb734e92d06c3eab1..fe3fa274d41594027157fc117fba3bf03424ab2b 100644 (file)
@@ -44,10 +44,6 @@ static struct vpd_cache vpd;
        PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |                 \
        PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP |                   \
-       PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm |                 \
-       PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
 #define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |    \
        PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST)
 
@@ -116,45 +112,6 @@ static void setup_iomux_enet(void)
        mdelay(1);
 }
 
-static iomux_v3_cfg_t const usdhc2_pads[] = {
-       MX6_PAD_SD2_CLK__SD2_CLK        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD2_CMD__SD2_CMD        | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD2_DAT0__SD2_DATA0     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD2_DAT1__SD2_DATA1     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD2_DAT2__SD2_DATA2     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD2_DAT3__SD2_DATA3     | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_GPIO_4__GPIO1_IO04      | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
-       MX6_PAD_SD3_CLK__SD3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_CMD__SD3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
-       MX6_PAD_SD4_CLK__SD4_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_CMD__SD4_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
 static iomux_v3_cfg_t const ecspi1_pads[] = {
        MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
        MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
@@ -229,76 +186,6 @@ static void setup_iomux_uart(void)
        imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
 }
 
-#ifdef CONFIG_FSL_ESDHC
-struct fsl_esdhc_cfg usdhc_cfg[3] = {
-       {USDHC2_BASE_ADDR},
-       {USDHC3_BASE_ADDR},
-       {USDHC4_BASE_ADDR},
-};
-
-#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
-#define USDHC4_CD_GPIO IMX_GPIO_NR(6, 11)
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-       struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-       int ret = 0;
-
-       switch (cfg->esdhc_base) {
-       case USDHC2_BASE_ADDR:
-               ret = !gpio_get_value(USDHC2_CD_GPIO);
-               break;
-       case USDHC3_BASE_ADDR:
-               ret = 1; /* eMMC is always present */
-               break;
-       case USDHC4_BASE_ADDR:
-               ret = !gpio_get_value(USDHC4_CD_GPIO);
-               break;
-       }
-
-       return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-       int ret;
-       int i;
-
-       for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-               switch (i) {
-               case 0:
-                       imx_iomux_v3_setup_multiple_pads(
-                               usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
-                       gpio_direction_input(USDHC2_CD_GPIO);
-                       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-                       break;
-               case 1:
-                       imx_iomux_v3_setup_multiple_pads(
-                               usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
-                       usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-                       break;
-               case 2:
-                       imx_iomux_v3_setup_multiple_pads(
-                               usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
-                       gpio_direction_input(USDHC4_CD_GPIO);
-                       usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-                       break;
-               default:
-                       printf("Warning: you configured more USDHC controllers\n"
-                              "(%d) then supported by the board (%d)\n",
-                              i + 1, CONFIG_SYS_FSL_USDHC_NUM);
-                       return -EINVAL;
-               }
-
-               ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
-               if (ret)
-                       return ret;
-       }
-
-       return 0;
-}
-#endif
-
 static int mx6_rgmii_rework(struct phy_device *phydev)
 {
        /* Configure AR8033 to ouput a 125MHz clk from CLK_25M */
index a883f658b9dd39acb08d217436eff107734294f8..b0f5c1f9a697643e88ec8b92ebda5884ea572c1a 100644 (file)
@@ -54,3 +54,7 @@ CONFIG_DM=y
 CONFIG_CMD_DM=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3"
+CONFIG_DM_MMC=y
+CONFIG_BLK=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
index 333657807177c97636506c9222d865df0839aa46..bb3c65efc7ea589d102a698c68751c6b3b436e94 100644 (file)
 #define CONFIG_LBA48
 #endif
 
-/* MMC Configs */
-#define CONFIG_FSL_USDHC
-#define CONFIG_SYS_FSL_ESDHC_ADDR      0
-
 /* USB Configs */
 #ifdef CONFIG_USB
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
@@ -82,7 +78,7 @@
        "image=/boot/fitImage\0" \
        "fdt_high=0xffffffff\0" \
        "dev=mmc\0" \
-       "devnum=1\0" \
+       "devnum=2\0" \
        "rootdev=mmcblk0p\0" \
        "quiet=quiet loglevel=0\0" \
        "console=" CONSOLE_DEV "\0" \