rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPL
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Thu, 29 Jun 2017 09:21:15 +0000 (11:21 +0200)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Sun, 13 Aug 2017 15:12:19 +0000 (17:12 +0200)
The back-to-bootrom option is rather unfortunately named
  CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM
instead of
  CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM

To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM),
we need to rename it.  At the same time, we introduce a TPL_ variant of
the option to give us finer-grained control over when it should be used.

This change is motivated by our RK3368 boot process, which returns to
the boot ROM only from the TPL stage, but not from the SPL stage.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[added fix-up for evb-rk3229_defconfig and phycore-rk3288_defconfig:]
[fixed inverted CONFIG_IS_ENABLED test for rk3288:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
include/configs/rock.h: undef

21 files changed:
arch/arm/mach-rockchip/Kconfig
arch/arm/mach-rockchip/rk3188-board-spl.c
arch/arm/mach-rockchip/rk3188-board.c
arch/arm/mach-rockchip/rk3288-board-spl.c
arch/arm/mach-rockchip/rk3288-board.c
arch/arm/mach-rockchip/rk3399-board-spl.c
configs/evb-rk3229_defconfig
configs/evb-rk3288_defconfig
configs/fennec-rk3288_defconfig
configs/firefly-rk3288_defconfig
configs/miqi-rk3288_defconfig
configs/phycore-rk3288_defconfig
configs/popmetal-rk3288_defconfig
configs/rock2_defconfig
configs/rock_defconfig
configs/tinker-rk3288_defconfig
doc/README.rockchip
include/configs/rk3188_common.h
include/configs/rk3288_common.h
include/configs/rock.h
include/configs/rockchip-common.h

index c9246132e097250fbeb4d9b078d4432313b12780..37885b8f8064d5926eb7f46fd7e9f2d010fe1847 100644 (file)
@@ -101,10 +101,21 @@ config ROCKCHIP_RV1108
          The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
          and a DSP.
 
-config ROCKCHIP_SPL_BACK_TO_BROM
+config SPL_ROCKCHIP_BACK_TO_BROM
        bool "SPL returns to bootrom"
        default y if ROCKCHIP_RK3036
        select ROCKCHIP_BROM_HELPER
+       depends on SPL
+       help
+         Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
+          SPL will return to the boot rom, which will then load the U-Boot
+          binary to keep going on.
+
+config TPL_ROCKCHIP_BACK_TO_BROM
+       bool "TPL returns to bootrom"
+       default y if ROCKCHIP_RK3368
+       select ROCKCHIP_BROM_HELPER
+       depends on TPL
        help
          Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
           SPL will return to the boot rom, which will then load the U-Boot
@@ -122,7 +133,7 @@ config ROCKCHIP_BROM_HELPER
        bool
 
 config SPL_MMC_SUPPORT
-       default y if !ROCKCHIP_SPL_BACK_TO_BROM
+       default y if !SPL_ROCKCHIP_BACK_TO_BROM
 
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
index c3e174db9eae3b8a0f4651a413c8d12c47b64b0f..d3866bf029a53c993efeaf78416abab659ab07b4 100644 (file)
@@ -167,8 +167,7 @@ void board_init_f(ulong dummy)
        }
 
        setup_arm_clock();
-
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
        back_to_bootrom();
 #endif
 }
@@ -229,7 +228,7 @@ void spl_board_init(void)
        }
 
        preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
        back_to_bootrom();
 #endif
        return;
index 3e76100ad1e541a436330f30b331a6b172a8e9bf..622e046dc0a754444aea5441b52a20e33e059162 100644 (file)
@@ -39,7 +39,7 @@ int board_late_init(void)
 
 int board_init(void)
 {
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
        struct udevice *pinctrl;
        int ret;
 
index 5668fd28a00097ab7e6afc1fd5e72026140bd470..6b7bf85d8d3347aaa3f2363935f971978f1830c0 100644 (file)
@@ -249,7 +249,7 @@ void board_init_f(ulong dummy)
                debug("DRAM init failed: %d\n", ret);
                return;
        }
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
        back_to_bootrom();
 #endif
 }
@@ -316,7 +316,7 @@ void spl_board_init(void)
        }
 
        preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
        back_to_bootrom();
 #endif
        return;
index 613967c307700bf3cb359051fcf5e055a226c779..d5f568c7932fe0501153361796a0e081ad1fd31e 100644 (file)
@@ -78,7 +78,7 @@ int board_late_init(void)
        return rk_board_late_init();
 }
 
-#ifndef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
 static int veyron_init(void)
 {
        struct udevice *dev;
@@ -115,7 +115,7 @@ static int veyron_init(void)
 
 int board_init(void)
 {
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
        struct udevice *pinctrl;
        int ret;
 
index e050affac06ca3c185cc6c92cb096174a3d8434e..710f7feae218dbea14354034401ec258b86ec36d 100644 (file)
@@ -28,7 +28,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL)
 static int spl_node_to_boot_device(int node)
 {
        struct udevice *parent;
@@ -263,7 +263,7 @@ void spl_board_init(void)
        }
 
        preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
        back_to_bootrom();
 #endif
 
index 8b9a288258b07b0ecdeff9a01b9afda7aed6c741..f4ad4c2c65eeaf5a4397ba13b41f9341f3b1ed1f 100644 (file)
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
index fa3884c922edd2f7546c4b3c2c76679606f4bfdf..88a70cdcc67b16de029bc18d7ff498346ce8221e 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
index 9d2b3199bc38b0e9b7147036f27e6a428e751cd1..2d6824284196cab2cc819bb12efd32237c50da3e 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
index 99a3f63b3e4c3d041989273617e00076b459e7be..b5408052efa1f10b5bfe543d4516038655fe1167 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
index a7c796d062deeb0f16e0b9a5999e02f4a2cd90e9..3dd18726107f1f843830003adeb619b33e086c63 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_MIQI_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
index 618d9839fdf4d6ea51cd5d4f69977eae36eee4f0..d09c92f7660e5885b63692ef177ac0ba14bb4b3b 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_PHYCORE_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
index cfa2205e8cf1926a32534f756db4ec926029a403..f68f988c16b5d8d4418e6c450692b472e2a17b7c 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_POPMETAL_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
index cca855cfdf6788e1d51daabb697ac41b62f347be..570ff3153b5b956fcf40c07afed2efe6039e18be 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_ROCK2=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
index 2ad6a6c521dad44e7a576d8ec98e48fa80901805..101b159d6075105a18fc9e3ae263c4e3b800f352 100644 (file)
@@ -4,7 +4,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3188=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_ROCK=y
 CONFIG_SPL_STACK_R_ADDR=0x60080000
 CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
index be937998e62ad9faf0fa955623c261d0e1b215e8..7dde8ab9f542deb8dd325eea7aeab1f1e865d563 100644 (file)
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_TINKER_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
index dbeb8be6c09646fceaca9cb21e768bfcceb4eaca..12fec38139c827a2d4511b97a1694984d473ce15 100644 (file)
@@ -130,7 +130,7 @@ load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
 Therefore RK3288 has another loading sequence like RK3036. The option of
 U-Boot is controlled with this setting in U-Boot:
 
-       #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+       #define CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 
 You can create the image via the following operations:
 
index 3ee9abd38d5034ede1fed0f0c527251ddae3d265..8a019361be7438d2884380fdffd06e88247a8bd6 100644 (file)
@@ -26,7 +26,7 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE           0x60000000
 #else
index 488d67924a0afe6c123967afa429bc1dbcd38150..ade6caf624d9492ebfe5dcfe2b94abea4e642542 100644 (file)
@@ -24,7 +24,7 @@
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_NS16550_MEM32
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE           0x00000000
 #else
index e998ec5f03cff94088b22d6468629ef21389fd50..6b0788be9db5f1b25e8b53703c6b6b22791a2a34 100644 (file)
@@ -12,7 +12,7 @@
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if defined(ROCKCHIP_BACK_TO_BROM)
 /* SPL @ 32k for 34k
  * u-boot directly after @ 68k for 400k or so
  * ENV @ 992k
index 29a492dc5529ca4c17e3031ac0668fbc281e35d6..b3986c28af43886cc42271bd762f27b7f2735ed3 100644 (file)
@@ -46,7 +46,7 @@
 
 #endif
 
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
 /* SPL @ 32k for 34k
  * u-boot directly after @ 68k for 400k or so
  * ENV @ 992k