Add DdrTimingC0 structure with associated bit fields.
These would help to reconfigure sdram capabilities during
lpddr4 setup related configs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
u32 denali_pi[200];
};
+union noc_ddrtimingc0 {
+ u32 d32;
+ struct {
+ unsigned burstpenalty : 4;
+ unsigned reserved0 : 4;
+ unsigned wrtomwr : 6;
+ unsigned reserved1 : 18;
+ } b;
+};
+
struct rk3399_msch_regs {
u32 coreid;
u32 revisionid;
struct rk3399_msch_timings {
u32 ddrtiminga0;
u32 ddrtimingb0;
- u32 ddrtimingc0;
+ union noc_ddrtimingc0 ddrtimingc0;
u32 devtodev0;
u32 ddrmode;
u32 agingx0;
&ddr_msch_regs->ddrtiminga0);
writel(noc_timing->ddrtimingb0,
&ddr_msch_regs->ddrtimingb0);
- writel(noc_timing->ddrtimingc0,
+ writel(noc_timing->ddrtimingc0.d32,
&ddr_msch_regs->ddrtimingc0);
writel(noc_timing->devtodev0,
&ddr_msch_regs->devtodev0);