Makefile: rename scripts/Makefile.build to scripts/Makefile.build.tmp

Some build scripts including scripts/Makefile.build
will be imported from Linux Kernel in the next commit.
We need to adjust them for U-Boot in the following commits.

To make it easier for reviewers to track the modification,
this commit renames scripts/Makefile.build to
scripts/Makefile.build.tmp beforehand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index 6113c13d161b676cb1b367035bcf3c0d3d4b0428..30a5551a4dc870f44767b14663b6edd02e613998 100644 (file)
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -165,7 +165,7 @@ ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2))
 # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
 # Usage:
 # $(Q)$(MAKE) $(build)=dir
-build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
+build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
 
 ###
 # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj=

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
deleted file mode 100644 (file)
index 52a44ff..0000000
--- a/scripts/Makefile.build
+++ /dev/null
@@ -1,127 +0,0 @@
-# our default target
-.PHONY: all
-all:
-
-ifeq ($(CONFIG_TPL_BUILD),y)
-  src := $(patsubst tpl/%,%,$(obj))
-else
-  ifeq ($(CONFIG_SPL_BUILD),y)
-    src := $(patsubst spl/%,%,$(obj))
-  else
-    src := $(obj)
-  endif
-endif
-
-include $(srctree)/scripts/Kbuild.include
-include $(srctree)/config.mk
-
-# variable LIB is used in examples/standalone/Makefile
-__LIB := $(obj)/built-in.o
-LIBGCC = $(obj)/libgcc.o
-SRCS :=
-subdir-y :=
-obj-dirs :=
-
-kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
-include $(kbuild-dir)/Makefile
-
-# Do not include host rules unless needed
-ifneq ($(hostprogs-y)$(hostprogs-m),)
-include $(SRCTREE)/scripts/Makefile.host.tmp
-endif
-
-# Going forward use the following
-obj-y := $(sort $(obj-y))
-extra-y := $(sort $(extra-y))
-always := $(sort $(always))
-lib-y := $(sort $(lib-y))
-
-subdir-y       += $(patsubst %/,%,$(filter %/, $(obj-y)))
-obj-y          := $(patsubst %/, %/built-in.o, $(obj-y))
-subdir-obj-y   := $(filter %/built-in.o, $(obj-y))
-subdir-obj-y   := $(addprefix $(obj)/,$(subdir-obj-y))
-
-SRCS   += $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) \
-       $(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S)
-
-SRCS := $(addprefix $(if $(KBUILD_SRC),$(srctree)/$(src)/,$(src)/),$(SRCS))
-SRCS := $(wildcard $(SRCS))
-
-OBJS   := $(addprefix $(obj)/,$(obj-y))
-
-# $(obj-dirs) is a list of directories that contain object files
-
-obj-dirs += $(dir $(OBJS))
-
-_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
-
-# Create directories for object files if directory does not exist
-# Needed when obj-y := dir/file.o syntax is used
-_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
-
-LGOBJS := $(addprefix $(obj)/,$(sort $(lib-y)))
-
-all: $(__LIB) $(addprefix $(obj)/,$(extra-y) $(always)) $(subdir-y)
-
-$(__LIB):      $(obj)/.depend $(OBJS)
-       $(call cmd_link_o_target, $(OBJS))
-
-ifneq ($(strip $(lib-y)),)
-all: $(LIBGCC)
-
-$(LIBGCC): $(obj)/.depend $(LGOBJS)
-       $(call cmd_link_o_target, $(LGOBJS))
-endif
-
-ifneq ($(subdir-obj-y),)
-# Descending
-$(subdir-obj-y): $(subdir-y)
-endif
-
-ifneq ($(subdir-y),)
-$(subdir-y): FORCE
-       $(MAKE) $(build)=$(obj)/$@
-endif
-
-#########################################################################
-
-# Allow boards to use custom optimize flags on a per dir/file basis
-ALL_AFLAGS = $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR))
-ALL_CFLAGS = $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR))
-EXTRA_CPPFLAGS = $(CPPFLAGS_$(BCURDIR)/$(@F)) $(CPPFLAGS_$(BCURDIR))
-ALL_CFLAGS += $(EXTRA_CPPFLAGS)
-
-# The _DEP version uses the $< file target (for dependency generation)
-# See rules.mk
-EXTRA_CPPFLAGS_DEP = $(CPPFLAGS_$(BCURDIR)/$(addsuffix .o,$(basename $<))) \
-               $(CPPFLAGS_$(BCURDIR))
-$(obj)/%.s:    $(src)/%.S
-       $(CPP) $(ALL_AFLAGS) -o $@ $<
-$(obj)/%.o:    $(src)/%.S
-       $(CC)  $(ALL_AFLAGS) -o $@ $< -c
-$(obj)/%.o:    $(src)/%.c
-ifneq ($(CHECKSRC),0)
-       $(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $<
-endif
-       $(CC)  $(ALL_CFLAGS) -o $@ $< -c
-$(obj)/%.i:    $(src)/%.c
-       $(CPP) $(ALL_CFLAGS) -o $@ $< -c
-$(obj)/%.s:    $(src)/%.c
-       $(CC)  $(ALL_CFLAGS) -o $@ $< -c -S
-
-# If the list of objects to link is empty, just create an empty built-in.o
-cmd_link_o_target = $(if $(strip $1),\
-                     $(LD) $(LDFLAGS) -r -o $@ $1,\
-                     rm -f $@; $(AR) rcs $@ )
-
-#########################################################################
-
-# defines $(obj)/.depend target
-
-include $(TOPDIR)/rules.mk
-
-sinclude $(obj)/.depend
-
-#########################################################################
-
-.PHONY: FORCE

diff --git a/scripts/Makefile.build.tmp b/scripts/Makefile.build.tmp
new file mode 100644 (file)
index 0000000..52a44ff
--- /dev/null
+++ b/scripts/Makefile.build.tmp
@@ -0,0 +1,127 @@
+# our default target
+.PHONY: all
+all:
+
+ifeq ($(CONFIG_TPL_BUILD),y)
+  src := $(patsubst tpl/%,%,$(obj))
+else
+  ifeq ($(CONFIG_SPL_BUILD),y)
+    src := $(patsubst spl/%,%,$(obj))
+  else
+    src := $(obj)
+  endif
+endif
+
+include $(srctree)/scripts/Kbuild.include
+include $(srctree)/config.mk
+
+# variable LIB is used in examples/standalone/Makefile
+__LIB := $(obj)/built-in.o
+LIBGCC = $(obj)/libgcc.o
+SRCS :=
+subdir-y :=
+obj-dirs :=
+
+kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
+include $(kbuild-dir)/Makefile
+
+# Do not include host rules unless needed
+ifneq ($(hostprogs-y)$(hostprogs-m),)
+include $(SRCTREE)/scripts/Makefile.host.tmp
+endif
+
+# Going forward use the following
+obj-y := $(sort $(obj-y))
+extra-y := $(sort $(extra-y))
+always := $(sort $(always))
+lib-y := $(sort $(lib-y))
+
+subdir-y       += $(patsubst %/,%,$(filter %/, $(obj-y)))
+obj-y          := $(patsubst %/, %/built-in.o, $(obj-y))
+subdir-obj-y   := $(filter %/built-in.o, $(obj-y))
+subdir-obj-y   := $(addprefix $(obj)/,$(subdir-obj-y))
+
+SRCS   += $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) \
+       $(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S)
+
+SRCS := $(addprefix $(if $(KBUILD_SRC),$(srctree)/$(src)/,$(src)/),$(SRCS))
+SRCS := $(wildcard $(SRCS))
+
+OBJS   := $(addprefix $(obj)/,$(obj-y))
+
+# $(obj-dirs) is a list of directories that contain object files
+
+obj-dirs += $(dir $(OBJS))
+
+_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
+
+# Create directories for object files if directory does not exist
+# Needed when obj-y := dir/file.o syntax is used
+_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
+
+LGOBJS := $(addprefix $(obj)/,$(sort $(lib-y)))
+
+all: $(__LIB) $(addprefix $(obj)/,$(extra-y) $(always)) $(subdir-y)
+
+$(__LIB):      $(obj)/.depend $(OBJS)
+       $(call cmd_link_o_target, $(OBJS))
+
+ifneq ($(strip $(lib-y)),)
+all: $(LIBGCC)
+
+$(LIBGCC): $(obj)/.depend $(LGOBJS)
+       $(call cmd_link_o_target, $(LGOBJS))
+endif
+
+ifneq ($(subdir-obj-y),)
+# Descending
+$(subdir-obj-y): $(subdir-y)
+endif
+
+ifneq ($(subdir-y),)
+$(subdir-y): FORCE
+       $(MAKE) $(build)=$(obj)/$@
+endif
+
+#########################################################################
+
+# Allow boards to use custom optimize flags on a per dir/file basis
+ALL_AFLAGS = $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR))
+ALL_CFLAGS = $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR))
+EXTRA_CPPFLAGS = $(CPPFLAGS_$(BCURDIR)/$(@F)) $(CPPFLAGS_$(BCURDIR))
+ALL_CFLAGS += $(EXTRA_CPPFLAGS)
+
+# The _DEP version uses the $< file target (for dependency generation)
+# See rules.mk
+EXTRA_CPPFLAGS_DEP = $(CPPFLAGS_$(BCURDIR)/$(addsuffix .o,$(basename $<))) \
+               $(CPPFLAGS_$(BCURDIR))
+$(obj)/%.s:    $(src)/%.S
+       $(CPP) $(ALL_AFLAGS) -o $@ $<
+$(obj)/%.o:    $(src)/%.S
+       $(CC)  $(ALL_AFLAGS) -o $@ $< -c
+$(obj)/%.o:    $(src)/%.c
+ifneq ($(CHECKSRC),0)
+       $(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $<
+endif
+       $(CC)  $(ALL_CFLAGS) -o $@ $< -c
+$(obj)/%.i:    $(src)/%.c
+       $(CPP) $(ALL_CFLAGS) -o $@ $< -c
+$(obj)/%.s:    $(src)/%.c
+       $(CC)  $(ALL_CFLAGS) -o $@ $< -c -S
+
+# If the list of objects to link is empty, just create an empty built-in.o
+cmd_link_o_target = $(if $(strip $1),\
+                     $(LD) $(LDFLAGS) -r -o $@ $1,\
+                     rm -f $@; $(AR) rcs $@ )
+
+#########################################################################
+
+# defines $(obj)/.depend target
+
+include $(TOPDIR)/rules.mk
+
+sinclude $(obj)/.depend
+
+#########################################################################
+
+.PHONY: FORCE