Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
DATA 0xFFD01428 0x00084520 # DDR2 SDRAM Timing Low
# bit3-0 : 0000, required
# bit7-4 : 0010, M_ODT assertion 2 cycles after read
-# bit11-8 : 1001, M_ODT de-assertion 5 cycles after read
+# bit11-8 : 0101, M_ODT de-assertion 5 cycles after read
# bit15-12: 0100, internal ODT assertion 4 cycles after read
# bit19-16: 1000, internal ODT de-assertion 8 cycles after read
# bit31-20: 0 , required