@$(call define_add,CONFIG_PCI,1)
@$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+yuncore_ap90q: qca953x_common
+ @$(call config_init,YunCore AP90Q,ap90q,16,17,1,QCA_QCA953X_SOC)
+ @$(call define_add,CONFIG_FOR_YUNCORE_AP90Q,1)
+ @$(call define_add,CFG_ATHRS27_PHY,1)
+ @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+ @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
zbtlink_zbt-we1526: qca953x_common
@$(call config_init,Zbtlink ZBT-WE1526,zbt-we1526,16,17,1,QCA_QCA953X_SOC)
@$(call define_add,CONFIG_FOR_ZBTLINK_ZBT_WE1526,1)
#define CONFIG_QCA_GPIO_MASK_IN GPIO17
#define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
+#elif defined(CONFIG_FOR_YUNCORE_AP90Q)
+
+ #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO12 | GPIO16
+ #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
+ #define CONFIG_QCA_GPIO_MASK_IN GPIO17
+ #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
+
#elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO11 | GPIO12 |\
"rootfstype=jffs2 init=/sbin/init "\
"mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
-#elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
+#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
"rootfstype=squashfs init=/sbin/init "\
#define CFG_LOAD_ADDR 0x9F020000
#elif defined(CONFIG_FOR_WALLYS_DR531)
#define CFG_LOAD_ADDR 0x9F050000
-#elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
+#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CFG_LOAD_ADDR 0x9FE80000
#endif
#define CFG_ENV_ADDR 0x9F030000
#define CFG_ENV_SIZE 0xF800
#define CFG_ENV_SECT_SIZE 0x10000
-#elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
+#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CFG_ENV_ADDR 0x9F040000
#define CFG_ENV_SIZE 0xFC00
#define CFG_ENV_SECT_SIZE 0x10000
#define OFFSET_MAC_DATA_BLOCK 0x030000
#define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
#define OFFSET_MAC_ADDRESS 0x00F810
-#elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
+#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define OFFSET_MAC_DATA_BLOCK 0xFF0000
#define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
#define OFFSET_MAC_ADDRESS 0x000000
* HTTP recovery configuration
* ===========================
*/
-#if defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
+#if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS CFG_FLASH_BASE + 0x50000
#else
#define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS CFG_LOAD_ADDR
defined(CONFIG_FOR_TPLINK_WR802N) ||\
defined(CONFIG_FOR_TPLINK_WR841N_V9)
#define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (192 * 1024)
-#elif defined(CONFIG_FOR_WALLYS_DR531) ||\
+#elif defined(CONFIG_FOR_WALLYS_DR531) ||\
+ defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (384 * 1024)
#endif
defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
defined(CONFIG_FOR_WALLYS_DR531) ||\
+ defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CONFIG_QCA_PLL QCA_PLL_PRESET_650_400_200
#endif
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x30000
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
-#elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
+#elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x40000
#define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
!defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
!defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) &&\
!defined(CONFIG_FOR_WALLYS_DR531) &&\
+ !defined(CONFIG_FOR_YUNCORE_AP90Q) &&\
!defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX 0x20000
#endif
-#if defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
+#if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
+ defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
#define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX 0x9F050000
#endif