ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY
authorAndre Przywara <andre.przywara@arm.com>
Thu, 16 Feb 2017 01:20:19 +0000 (01:20 +0000)
committerJagan Teki <jagan@amarulasolutions.com>
Wed, 5 Apr 2017 09:33:17 +0000 (15:03 +0530)
Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the
frequency of the ARM Generic Timer (aka. arch timer).
ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same
purpose. It seems useful to unify them.
Since there are less occurences of the latter version, lets convert all
users over to COUNTER_FREQUENCY.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
arch/arm/cpu/armv7/nonsec_virt.S
arch/arm/cpu/armv7/sunxi/psci.c
board/sunxi/board.c
include/configs/exynos-common.h
include/configs/ls1021aiot.h
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/mx7_common.h
include/configs/sun50i.h
include/configs/sunxi-common.h
scripts/config_whitelist.txt

index 95ce9387b83e972414b6de2d5711a9f40fe097df..e39aba711587ecafabb8457d6c34bde1abb42353 100644 (file)
@@ -188,11 +188,11 @@ ENTRY(_nonsec_init)
  * we do this here instead.
  * But first check if we have the generic timer.
  */
-#ifdef CONFIG_TIMER_CLK_FREQ
+#ifdef COUNTER_FREQUENCY
        mrc     p15, 0, r0, c0, c1, 1           @ read ID_PFR1
        and     r0, r0, #CPUID_ARM_GENTIMER_MASK        @ mask arch timer bits
        cmp     r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
-       ldreq   r1, =CONFIG_TIMER_CLK_FREQ
+       ldreq   r1, =COUNTER_FREQUENCY
        mcreq   p15, 0, r1, c14, c0, 0          @ write CNTFRQ
 #endif
 
index 766b8c79d93d05949845b85e421b7dbd2e8a473a..104dc909bc53360ac37c83439dd7c407acec62b2 100644 (file)
@@ -46,7 +46,7 @@ static u32 __secure cp15_read_cntp_ctl(void)
        return val;
 }
 
-#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000)
+#define ONE_MS (COUNTER_FREQUENCY / 1000)
 
 static void __secure __mdelay(u32 ms)
 {
index 53656383d512199338dcdc1d4fdc4f7f939c9b61..b9660128e5e74535be9756a95f36b245f30e1565 100644 (file)
@@ -100,14 +100,14 @@ int board_init(void)
                 * we avoid the risk of writing to it.
                 */
                asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq));
-               if (freq != CONFIG_TIMER_CLK_FREQ) {
+               if (freq != COUNTER_FREQUENCY) {
                        debug("arch timer frequency is %d Hz, should be %d, fixing ...\n",
-                             freq, CONFIG_TIMER_CLK_FREQ);
+                             freq, COUNTER_FREQUENCY);
 #ifdef CONFIG_NON_SECURE
                        printf("arch timer frequency is wrong, but cannot adjust it\n");
 #else
                        asm volatile("mcr p15, 0, %0, c14, c0, 0"
-                                    : : "r"(CONFIG_TIMER_CLK_FREQ));
+                                    : : "r"(COUNTER_FREQUENCY));
 #endif
                }
        }
index b4f75302dbfd2b8494842c115210be7f6f13ec89..ade66a43309d8ee5fe5135515e10962a336f36cf 100644 (file)
@@ -23,7 +23,7 @@
 
 /* input clock of PLL: 24MHz input clock */
 #define CONFIG_SYS_CLK_FREQ            24000000
-#define CONFIG_TIMER_CLK_FREQ          CONFIG_SYS_CLK_FREQ
+#define COUNTER_FREQUENCY              CONFIG_SYS_CLK_FREQ
 
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_CMDLINE_TAG
index db29fa2ba12eb5ca7b9d899246f612647c20aa2f..906fc9a4aceb20cb4c70476d7a7a76af79f921fe 100644 (file)
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ          12500000
+#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index 4fb8b0ca8cac5a61db9bfb4690184532fa0ef1d4..0f239d4aacc148abc1a245fb26ec9fd2e3602ad5 100644 (file)
@@ -500,7 +500,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ          12500000
+#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index c6438d5ec698b1a330e2f3e15bc8701c4b86e2d4..7915c39ee7059f603d2cb301b72c6291d4337a36 100644 (file)
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ          12500000
+#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index 5bf8ad74b8cf73ae362d071cb68fc1a4016cbafb..e2b05caa945fae3239126c39c85555a1b3694ea5 100644 (file)
@@ -21,7 +21,7 @@
 #define CONFIG_MXC_GPT_HCLK
 #define CONFIG_SYSCOUNTER_TIMER
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
-#define CONFIG_TIMER_CLK_FREQ CONFIG_SC_TIMER_CLK
+#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
 #define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_SYS_BOOTM_LEN   0x1000000
index 3e5708b49368d6b981878a860c8330c29925525c..1b7bfb6c22eb1fadcadd5362561f141ff82ab069 100644 (file)
@@ -18,7 +18,6 @@
 
 #define CONFIG_SUNXI_USB_PHYS  1
 
-#define COUNTER_FREQUENCY      CONFIG_TIMER_CLK_FREQ
 #define GICD_BASE              0x1c81000
 #define GICC_BASE              0x1c82000
 
index 05ea172fe3f5a206a26887b2a9e302449ac9e2bc..7e5a7dcc81ade6234f389300b84d8b99f5992ff0 100644 (file)
@@ -46,7 +46,7 @@
 #endif
 
 /* CPU */
-#define CONFIG_TIMER_CLK_FREQ          24000000
+#define COUNTER_FREQUENCY              24000000
 
 /*
  * The DRAM Base differs between some models. We cannot use macros for the
index 668f238459cf27b5c32265fedf9838d1274919ed..bed42607d22db9c0f1f27c1cd4103b1b3043a364 100644 (file)
@@ -6453,7 +6453,6 @@ CONFIG_TI816X_EVM_DDR3
 CONFIG_TI816X_USE_EMIF0
 CONFIG_TI816X_USE_EMIF1
 CONFIG_TI81XX
-CONFIG_TIMER_CLK_FREQ
 CONFIG_TIMESTAMP
 CONFIG_TIZEN
 CONFIG_TI_KEYSTONE_SERDES