ARM: DTS: imx6q-logicpd: Resync with Linux 5.1
authorAdam Ford <aford173@gmail.com>
Fri, 31 May 2019 12:09:22 +0000 (07:09 -0500)
committerTom Rini <trini@konsulko.com>
Wed, 5 Jun 2019 16:14:02 +0000 (12:14 -0400)
Resync imx6q-logicpd with Kernel 5.1.5

Signed-off-by: Adam Ford <aford173@gmail.com>
arch/arm/dts/imx6-logicpd-baseboard.dtsi
arch/arm/dts/imx6-logicpd-som.dtsi
arch/arm/dts/imx6q-logicpd.dts

index 303c09334ba7e6405e1710da087768b7181becc6..c40a7af6ebee08b0f2de80c6cb300d3081387494 100644 (file)
@@ -1,45 +1,6 @@
-/*
- * Copyright 2018 Logic PD, Inc.
- * Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2019 Logic PD, Inc.
 
 / {
        keyboard {
@@ -68,6 +29,7 @@
                        debounce-interval = <10>;
                        wakeup-source;
                };
+
                btn3 {
                        gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>;
                        label = "btn3";
@@ -81,7 +43,7 @@
        leds {
                compatible = "gpio-leds";
 
-               gen_led0 {
+               gen-led0 {
                        label = "led0";
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_led0>;
                        linux,default-trigger = "cpu0";
                };
 
-               gen_led1 {
+               gen-led1 {
                        label = "led1";
                        gpios = <&pcf8575 8 GPIO_ACTIVE_HIGH>;
                };
 
-               gen_led2 {
+               gen-led2 {
                        label = "led2";
                        gpios = <&pcf8575 9 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "heartbeat";
                };
 
-               gen_led3 {
+               gen-led3 {
                        label = "led3";
                        gpios = <&pcf8575 10 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "default-on";
                };
        };
 
-       reg_usb_otg_vbus: regulator-otg-vbus@0 {
+       reg_usb_otg_vbus: regulator-otg-vbus {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usb_otg>;
                compatible = "regulator-fixed";
                regulator-name = "usb_otg_vbus";
                regulator-min-microvolt = <5000000>;
                enable-active-high;
        };
 
-       reg_usb_h1_vbus: regulator-usbh1vbus@1 {
+       reg_usb_h1_vbus: regulator-usb-h1-vbus {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usb_h1_vbus>;
                compatible = "regulator-fixed";
                regulator-name = "usb_h1_vbus";
                regulator-min-microvolt = <5000000>;
                regulator-max-microvolt = <5000000>;
+               gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
+               startup-delay-us = <70000>;
+               enable-active-high;
        };
 
-       reg_3v3: regulator-3v3@2 {
+       reg_3v3: regulator-3v3 {
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_reg_3v3>;
                compatible = "regulator-fixed";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+               startup-delay-us = <70000>;
                enable-active-high;
                regulator-always-on;
        };
 
-       reg_enet: regulator-ethernet@3 {
+       reg_enet: regulator-ethernet {
                pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_enet_pwr>;
+               pinctrl-0 = <&pinctrl_reg_enet>;
                compatible = "regulator-fixed";
                regulator-name = "ethernet-supply";
                regulator-min-microvolt = <3300000>;
                vin-supply = <&sw4_reg>;
        };
 
-       reg_audio: regulator-audio@4 {
+       reg_audio: regulator-audio {
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_reg_audio>;
                compatible = "regulator-fixed";
                regulator-max-microvolt = <3300000>;
                gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
                enable-active-high;
-               regulator-always-on;
                vin-supply = <&reg_3v3>;
        };
 
-       reg_hdmi: regulator-hdmi@5 {
+       reg_hdmi: regulator-hdmi {
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_reg_hdmi>;
                compatible = "regulator-fixed";
                vin-supply = <&reg_3v3>;
        };
 
-       reg_uart3: regulator-uart3@6 {
+       reg_uart3: regulator-uart3 {
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_reg_uart3>;
                compatible = "regulator-fixed";
                vin-supply = <&reg_3v3>;
        };
 
-       reg_1v8: regulator-1v8@7 {
+       reg_1v8: regulator-1v8 {
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_reg_1v8>;
                compatible = "regulator-fixed";
                vin-supply = <&reg_3v3>;
        };
 
-       reg_pcie: regulator@8 {
+       reg_pcie: regulator-pcie {
                compatible = "regulator-fixed";
                pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_pcie_reg>;
-               regulator-name = "MPCIE_3V3";
+               pinctrl-0 = <&pinctrl_reg_pcie>;
+               regulator-name = "mpcie_3v3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
                enable-active-high;
        };
 
-       mipi_pwr: regulator@9 {
+       reg_mipi: regulator-mipi {
                compatible = "regulator-fixed";
                pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_mipi_pwr>;
+               pinctrl-0 = <&pinctrl_reg_mipi>;
                regulator-name = "mipi_pwr_en";
                regulator-min-microvolt = <2800000>;
                regulator-max-microvolt = <2800000>;
                compatible = "fsl,imx-audio-wm8962";
                model = "wm8962-audio";
                ssi-controller = <&ssi2>;
-               audio-codec = <&codec>;
+               audio-codec = <&wm8962>;
                audio-routing =
                        "Headphone Jack", "HPOUTL",
                        "Headphone Jack", "HPOUTR",
        status = "disabled";
 };
 
-&pwm3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pwm3>;
-};
-
-&uart3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart3>;
-       status = "okay";
-};
-
-&usbh1 {
-       vbus-supply = <&reg_usb_h1_vbus>;
-       status = "okay";
-};
-
-&usbotg {
-       vbus-supply = <&reg_usb_otg_vbus>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usbotg>;
-       disable-over-current;
-       status = "okay";
-};
-
 &fec {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        phy-reset-duration = <10>;
        phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
        phy-supply = <&reg_enet>;
        status = "okay";
 };
 
-&usdhc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc2>;
-       pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
-       no-1-8-v;
-       keep-power-in-suspend;
-       status = "okay";
-};
-
 &i2c1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c1>;
        clock-frequency = <400000>;
        status = "okay";
 
-       codec: wm8962@1a {
+       wm8962: audio-codec@1a {
                compatible = "wlf,wm8962";
                reg = <0x1a>;
                clocks = <&clks IMX6QDL_CLK_CKO>;
                reg = <0x10>;
                clocks = <&clks IMX6QDL_CLK_CKO>;
                clock-names = "xclk";
-               DOVDD-supply = <&mipi_pwr>;
-               AVDD-supply = <&mipi_pwr>;
-               DVDD-supply = <&mipi_pwr>;
+               DOVDD-supply = <&reg_mipi>;
+               AVDD-supply = <&reg_mipi>;
+               DVDD-supply = <&reg_mipi>;
                reset-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
                powerdown-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
 
        };
 };
 
+&ipu1_csi1_from_mipi_vc1 {
+       clock-lanes = <0>;
+       data-lanes = <1 2>;
+};
+
 &mipi_csi {
        status = "okay";
 
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
        reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
-       status = "okay";
        vpcie-supply = <&reg_pcie>;
-       /* fsl,max-link-speed = <2>; */
+       status = "okay";
+};
+
+&pwm3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm3>;
 };
 
 &ssi2 {
        status = "okay";
 };
 
-&iomuxc {
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       status = "okay";
+};
 
+&usbh1 {
+       vbus-supply = <&reg_usb_h1_vbus>;
+       status = "okay";
+};
+
+&usbotg {
+       vbus-supply = <&reg_usb_otg_vbus>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbotg>;
+       disable-over-current;
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+       vmmc-supply = <&reg_3v3>;
+       no-1-8-v;
+       keep-power-in-suspend;
+       cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&iomuxc {
        pinctrl_audmux: audmuxgrp {
                fsl,pins = <
                        MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
                >;
        };
 
-       pinctrl_i2c1: i2c1 {
+       pinctrl_ecspi1: ecspi1grp {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_D21__I2C1_SCL    0x4001b8b1
-                       MX6QDL_PAD_EIM_D28__I2C1_SDA    0x4001b8b1
+                       MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
+                       MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
+                       MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
+                       MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0         0x100b1
                >;
        };
 
-       pinctrl_enet_pwr: enet_pwr {
+       pinctrl_enet: enetgrp {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_D31__GPIO3_IO31  0x1b0b0
+                       MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b8b0
+                       MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                       MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
+                       MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
+                       MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x1b0b0 /* ENET_INT */
+                       MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24       0x1b0b0 /* ETHR_nRST */
                >;
        };
 
-       pinctrl_mipi_pwr: pwr_mipi {
-               fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>;
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D21__I2C1_SCL    0x4001b8b1
+                       MX6QDL_PAD_EIM_D28__I2C1_SDA    0x4001b8b1
+               >;
+       };
+
+       pinctrl_led0: led0grp {
+           fsl,pins = <
+               MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x1b0b0
+           >;
        };
 
        pinctrl_ov5640: ov5640grp {
                >;
        };
 
-       pinctrl_reg_hdmi: reg_hdmi {
+       pinctrl_pcf8574: pcf8575grp {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_D20__GPIO3_IO20  0x1b0b0
+                       MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
                >;
        };
 
-       pinctrl_uart3: uart3grp {
+       pinctrl_pcie: pciegrp {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
-                       MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
-                       MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
-                       MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
+                       MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
+                       MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
                >;
        };
 
-       pinctrl_usbotg: usbotggrp {
-               fsl,pins = <
-                       MX6QDL_PAD_GPIO_1__USB_OTG_ID   0xd17059
-                       MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0
-               >;
+       pinctrl_pwm3: pwm3grp {
+           fsl,pins = <
+               MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
+           >;
        };
 
-       pinctrl_ecspi1: ecspi1grp {
-               fsl,pins = <
-                       MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
-                       MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
-                       MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
-                       MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0         0x100b1
-               >;
+       pinctrl_reg_1v8: reg1v8grp {
+           fsl,pins = <
+               MX6QDL_PAD_EIM_D30__GPIO3_IO30          0x1b0b0
+           >;
        };
 
-       pinctrl_usdhc2: usdhc2grp {
-               fsl,pins = <
-                       MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0 /* CD */
-                       MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17069
-                       MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10069
-                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17069
-                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17069
-                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17069
-                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17069
-               >;
-       };
-
-       pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {
-               fsl,pins = <
-                       MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0 /* CD */
-                       MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170b9
-                       MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100b9
-                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170b9
-                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170b9
-                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170b9
-                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170b9
-               >;
+       pinctrl_reg_3v3: reg3v3grp {
+           fsl,pins = <
+               MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b0
+           >;
        };
 
-       pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {
+       pinctrl_reg_audio: reg-audiogrp {
                fsl,pins = <
-                       MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0 /* CD */
-                       MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170f9
-                       MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100f9
-                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170f9
-                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170f9
-                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170f9
-                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170f9
+                       MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
                >;
        };
 
-       pinctrl_enet: enetgrp {
+       pinctrl_reg_enet: reg-enetgrp {
                fsl,pins = <
-                       MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b8b0
-                       MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
-                       MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
-                       MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
-                       MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x1b0b0 /* ENET_INT */
-                       MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24       0x1b0b0 /* ETHR_nRST */
+                       MX6QDL_PAD_EIM_D31__GPIO3_IO31  0x1b0b0
                >;
        };
 
-       pinctrl_reg_audio: audio-reg {
+       pinctrl_reg_hdmi: reg-hdmigrp {
                fsl,pins = <
-                       MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
+                       MX6QDL_PAD_EIM_D20__GPIO3_IO20  0x1b0b0
                >;
        };
 
-       pinctrl_pcie: pcie {
-               fsl,pins = <
-                       MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
-                       MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
-               >;
+       pinctrl_reg_mipi: reg-mipigrp {
+               fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>;
        };
 
-       pinctrl_pcie_reg: pciereggrp {
+       pinctrl_reg_pcie: reg-pciegrp {
                fsl,pins = <
                        MX6QDL_PAD_GPIO_2__GPIO1_IO02   0x1b0b0
                        >;
        };
 
-       pinctrl_pcf8574: pcf8575-pins {
+       pinctrl_reg_uart3: reguart3grp {
+           fsl,pins = <
+               MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0
+           >;
+       };
+
+       pinctrl_reg_usb_h1_vbus: usbh1grp {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
+                       MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x1b0b0
                >;
        };
 
-       pinctrl_lcd: lcdgrp {
+       pinctrl_reg_usb_otg: reg-usb-otggrp {
                fsl,pins = <
-                       MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 /* R_LCD_DCLK */
-                       MX6QDL_PAD_DI0_PIN15__GPIO4_IO17        0x100b0 /* R_LCD_PANEL_PWR */
-                       MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02     0x10    /* R_LCD_HSYNC */
-                       MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03     0x10    /* R_LCD_VSYNC */
-                       MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04     0x10    /* R_LCD_MDISP */
-                       MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x10
-                       MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x10
-                       MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
-                       MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
-                       MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
-                       MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
-                       MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
-                       MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
-                       MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
-                       MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
-                       MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
-                       MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
-                       MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
-                       MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
-                       MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
-                       MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
+                       MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x1b0b0
                >;
        };
 
-       pinctrl_pwm3: pwm3grp {
+       pinctrl_uart3: uart3grp {
                fsl,pins = <
-                       MX6QDL_PAD_SD4_DAT1__PWM3_OUT           0x1b0b1
+                       MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
+                       MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
+                       MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
+                       MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
                >;
        };
 
-       pinctrl_reg_uart3: uart3reg {
+       pinctrl_usbotg: usbotggrp {
                fsl,pins = <
-                       MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0
+                       MX6QDL_PAD_GPIO_1__USB_OTG_ID   0xd17059
                >;
        };
 
-       pinctrl_reg_3v3: reg-3v3 {
+       pinctrl_usdhc2: usdhc2grp {
                fsl,pins = <
-                       MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b0
+                       MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0 /* CD */
+                       MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17069
+                       MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10069
+                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17069
+                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17069
+                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17069
+                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17069
                >;
        };
 
-       pinctrl_reg_1v8: reg-1v8 {
+       pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_D30__GPIO3_IO30          0x1b0b0
+                       MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0 /* CD */
+                       MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170b9
+                       MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100b9
+                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170b9
+                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170b9
+                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170b9
+                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170b9
                >;
        };
 
-       pinctrl_led0: led0 {
+       pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {
                fsl,pins = <
-                       MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x1b0b0
+                       MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x1b0b0 /* CD */
+                       MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170f9
+                       MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100f9
+                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170f9
+                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170f9
+                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170f9
+                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170f9
                >;
        };
+
 };
index 3fc50babf09979816c67c17fbe3248b13d29a6a8..7ceae357324860c9ff79bf41c5deb34d6fff3cc1 100644 (file)
@@ -1,16 +1,6 @@
-/*
- * Copyright 2018 Logic PD
- * This file is adapted from imx6qdl-sabresd.dtsi.
- * Copyright 2012 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2019 Logic PD, Inc.
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
@@ -20,7 +10,8 @@
                stdout-path = &uart1;
        };
 
-       memory {
+       memory@10000000 {
+               device_type = "memory";
                reg = <0x10000000 0x80000000>;
        };
 
        };
 };
 
-/* Reroute power feeding the CPU to come from the external PMIC */
-&reg_arm
-{
-       vin-supply = <&sw1a_reg>;
-};
-
-&reg_soc
-{
-       vin-supply = <&sw1c_reg>;
-};
-
 &clks {
        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
                          <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
@@ -56,8 +36,8 @@
 &gpmi {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_gpmi_nand>;
-       status = "okay";
        nand-on-flash-bbt;
+       status = "okay";
 };
 
 &i2c3 {
@@ -66,7 +46,7 @@
        pinctrl-0 = <&pinctrl_i2c3>;
        status = "okay";
 
-       pmic: pfuze100@08 {
+       pfuze100: pmic@8 {
                compatible = "fsl,pfuze100";
                reg = <0x08>;
 
                                regulator-max-microvolt = <3300000>;
                                regulator-name = "gen_3v3";
                                regulator-boot-on;
-                               /* regulator-always-on; */
                        };
 
                        sw3a_reg: sw3a {
-                               regulator-min-microvolt = <400000>;
-                               regulator-max-microvolt = <1975000>;
+                               regulator-min-microvolt = <1350000>;
+                               regulator-max-microvolt = <1350000>;
                                regulator-name = "sw3a_vddr";
                                regulator-boot-on;
                                regulator-always-on;
                        };
 
                        sw3b_reg: sw3b {
-                               regulator-min-microvolt = <400000>;
-                               regulator-max-microvolt = <1975000>;
+                               regulator-min-microvolt = <1350000>;
+                               regulator-max-microvolt = <1350000>;
                                regulator-name = "sw3b_vddr";
                                regulator-boot-on;
                                regulator-always-on;
 
                        vgen3_reg: vgen3 {
                                regulator-name = "gen_vadj_0";
-                               regulator-min-microvolt = <3000000>;
-                               regulator-max-microvolt = <3000000>;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
                        };
 
                        vgen4_reg: vgen4 {
                        };
 
                        vgen5_reg: vgen5 {
-                               regulator-name = "gen_adj_1";
-                               regulator-min-microvolt = <3300000>;
+                               regulator-name = "gen_vadj_1";
+                               regulator-min-microvolt = <1800000>;
                                regulator-max-microvolt = <3300000>;
                                regulator-always-on;
                        };
                };
        };
 
-       temp_sense0: tmp102@4a {
+       temperature-sensor@49 {
                compatible = "ti,tmp102";
-               reg = <0x4a>;
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_tempsense>;
+               reg = <0x49>;
                interrupt-parent = <&gpio6>;
                interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
                #thermal-sensor-cells = <1>;
        };
 
-       temp_sense1: tmp102@49 {
+       temperature-sensor@4a {
                compatible = "ti,tmp102";
-               reg = <0x49>;
+               reg = <0x4a>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_tempsense>;
                interrupt-parent = <&gpio6>;
                interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
                #thermal-sensor-cells = <1>;
        };
 
-       mfg_eeprom: at24@51 {
+       eeprom@51 {
                compatible = "atmel,24c64";
                pagesize = <32>;
-               read-only;
+               read-only;      /* Manufacturing EEPROM programmed at factory */
                reg = <0x51>;
        };
 
-       user_eeprom: at24@52 {
+       eeprom@52 {
                compatible = "atmel,24c64";
                pagesize = <32>;
                reg = <0x52>;
        };
 };
 
+/* Reroute power feeding the CPU to come from the external PMIC */
+&reg_arm
+{
+       vin-supply = <&sw1a_reg>;
+};
+
+&reg_soc
+{
+       vin-supply = <&sw1c_reg>;
+};
+
 &iomuxc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog>;
 
-       pinctrl_hog: hoggrp {
+       pinctrl_gpmi_nand: gpmi-nandgrp {
                fsl,pins = <
+                       MX6QDL_PAD_NANDF_CLE__NAND_CLE          0x0b0b1
+                       MX6QDL_PAD_NANDF_ALE__NAND_ALE          0x0b0b1
+                       MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0x0b0b1
+                       MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0x0b000
+                       MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0x0b0b1
+                       MX6QDL_PAD_SD4_CMD__NAND_RE_B           0x0b0b1
+                       MX6QDL_PAD_SD4_CLK__NAND_WE_B           0x0b0b1
+                       MX6QDL_PAD_NANDF_D0__NAND_DATA00        0x0b0b1
+                       MX6QDL_PAD_NANDF_D1__NAND_DATA01        0x0b0b1
+                       MX6QDL_PAD_NANDF_D2__NAND_DATA02        0x0b0b1
+                       MX6QDL_PAD_NANDF_D3__NAND_DATA03        0x0b0b1
+                       MX6QDL_PAD_NANDF_D4__NAND_DATA04        0x0b0b1
+                       MX6QDL_PAD_NANDF_D5__NAND_DATA05        0x0b0b1
+                       MX6QDL_PAD_NANDF_D6__NAND_DATA06        0x0b0b1
+                       MX6QDL_PAD_NANDF_D7__NAND_DATA07        0x0b0b1
+               >;
+       };
+
+       pinctrl_hog: hoggrp {
+               fsl,pins = <    /* Enable ARM Debugger */
                        MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL     0x1b0b0
                        MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO      0x1b0b0
                        MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00      0x1b0b0
                >;
        };
 
-       pinctrl_gpmi_nand: gpminandgrp {
+       pinctrl_i2c3: i2c3grp {
                fsl,pins = <
-                       MX6QDL_PAD_NANDF_CLE__NAND_CLE          0x0b0b1
-                       MX6QDL_PAD_NANDF_ALE__NAND_ALE          0x0b0b1
-                       MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0x0b0b1
-                       MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0x0b000
-                       MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0x0b0b1
-                       MX6QDL_PAD_SD4_CMD__NAND_RE_B           0x0b0b1
-                       MX6QDL_PAD_SD4_CLK__NAND_WE_B           0x0b0b1
-                       MX6QDL_PAD_NANDF_D0__NAND_DATA00        0x0b0b1
-                       MX6QDL_PAD_NANDF_D1__NAND_DATA01        0x0b0b1
-                       MX6QDL_PAD_NANDF_D2__NAND_DATA02        0x0b0b1
-                       MX6QDL_PAD_NANDF_D3__NAND_DATA03        0x0b0b1
-                       MX6QDL_PAD_NANDF_D4__NAND_DATA04        0x0b0b1
-                       MX6QDL_PAD_NANDF_D5__NAND_DATA05        0x0b0b1
-                       MX6QDL_PAD_NANDF_D6__NAND_DATA06        0x0b0b1
-                       MX6QDL_PAD_NANDF_D7__NAND_DATA07        0x0b0b1
+                       MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
+                       MX6QDL_PAD_EIM_D18__I2C3_SDA            0x4001b8b1
                >;
        };
 
-       pinctrl_i2c3: i2c3grp {
+       pinctrl_tempsense: tempsensegrp {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_D17__I2C3_SCL            0x4001b8b1
-                       MX6QDL_PAD_EIM_D18__I2C3_SDA            0x4001b8b1
+                       MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
                >;
        };
 
 
        pinctrl_uart2: uart2grp {
                fsl,pins = <
-                       MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x13059 /* BT_EN */
+                       MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x13059 /* BT_EN */
                        MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
                        MX6QDL_PAD_SD4_DAT5__UART2_RTS_B        0x1b0b1
                        MX6QDL_PAD_SD4_DAT6__UART2_CTS_B        0x1b0b1
                        MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */
                >;
        };
-
-       pinctrl_tempsense: tempsensegrp {
-               fsl,pins = <
-                       MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0        /* Temp Sense Alert */
-               >;
-       };
 };
 
 &snvs_poweroff {
 &uart2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart2>;
-       status = "okay";
        uart-has-rtscts;
+       status = "okay";
+
        bluetooth {
                compatible = "ti,wl1837-st";
                enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
        pinctrl-0 = <&pinctrl_usdhc1>;
        non-removable;
        keep-power-in-suspend;
-       enable-sdio-wakeup;
-       status = "okay";
+       wakeup-source;
        vmmc-supply = <&sw2_reg>;
+       status = "okay";
 };
 
 &usdhc3 {
        keep-power-in-suspend;
        wakeup-source;
        vmmc-supply = <&reg_wl18xx_vmmc>;
-       status = "okay";
        #address-cells = <1>;
        #size-cells = <0>;
+       status = "okay";
+
        wlcore: wlcore@2 {
                  compatible = "ti,wl1837";
                  reg = <2>;
index dcea784477be96880319a65a3e4a44ecbba5fd54..45eb0b7f75f83c88339a7e04ebc42cdf77e037fb 100644 (file)
@@ -1,45 +1,6 @@
-/*
- * Copyright 2018 Logic PD, Inc.
- * Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2019 Logic PD, Inc.
 
 /dts-v1/;
 #include "imx6q.dtsi"
 #include "imx6-logicpd-baseboard.dtsi"
 
 / {
-       model = "Logic PD i.MX6QD SOM-M3 (HDMI)";
+       model = "Logic PD i.MX6QD SOM-M3";
        compatible = "fsl,imx6q";
 
-       backlight: backlight_lvds {
+       backlight: backlight-lvds {
                compatible = "pwm-backlight";
                pwms = <&pwm3 0 20000>;
                brightness-levels = <0 4 8 16 32 64 128 255>;
                power-supply = <&reg_lcd>;
        };
 
+       panel-lvds0 {
+               compatible = "okaya,rs800480t-7x0gp";
+
+               port {
+                       panel_in_lvds0: endpoint {
+                               remote-endpoint = <&lvds0_out>;
+                       };
+               };
+       };
+
        reg_lcd: regulator-lcd {
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_lcd_reg>;
@@ -72,7 +43,7 @@
                startup-delay-us = <500000>;
        };
 
-       lcd_reset: lcd_reset {
+       reg_lcd_reset: regulator-lcd-reset {
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_lcd_reset>;
                compatible = "regulator-fixed";
                regulator-always-on;
                vin-supply = <&reg_lcd>;
        };
+};
 
-       panel-lvds0 {
-               compatible = "ampire,am800480b3tmqw";
-               backlight = <&backlight>;
-
-               port {
-                       panel_in_lvds0: endpoint {
-                               remote-endpoint = <&lvds0_out>;
-                       };
-               };
-       };
+&clks {
+       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
+                         <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
+                         <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
+       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
+                                <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
+                                <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
+                                <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
 };
 
 &hdmi {
        status = "okay";
 };
 
-&i2c1 {
-       ili_touch: ilitouch@26 {
-               compatible = "ili,ili2117a";
-               reg = <0x26>;
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_touchscreen>;
-               interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_RISING>;
-               ili2117a,poll-period = <10>;
-               ili2117a,max-touch = <2>;
-       };
-};
-
-&reg_hdmi {
-       regulator-always-on;
-};
-
 &ldb {
        status = "okay";
 
 
                port@4 {
                        reg = <4>;
-
                        lvds0_out: endpoint {
                                remote-endpoint = <&panel_in_lvds0>;
                        };
 
 };
 
-&clks {
-       assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
-                         <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
-                         <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
-                         <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
-       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
-                                <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
-                                <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
-                                <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
-};
-
 &pwm3 {
        status = "okay";
 };
 
-&usdhc2 {
-       cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+&reg_hdmi {
+       regulator-always-on;    /* Without this, the level shifter on HDMI doesn't turn on */
 };
 
 &iomuxc {
 
        pinctrl_lcd_reset: lcdreset {
                fsl,pins = <
-                       MX6QDL_PAD_EIM_A25__GPIO5_IO02      0x100b0     /* LCD_nRESET */
+                       MX6QDL_PAD_EIM_A25__GPIO5_IO02  0x100b0 /* LCD_nRESET */
                >;
        };
 
                >;
        };
 };
-