Blackfin: dma_memcpy(): fix random failures
authorMike Frysinger <vapier@gentoo.org>
Wed, 5 Nov 2008 12:20:37 +0000 (07:20 -0500)
committerMike Frysinger <vapier@gentoo.org>
Mon, 2 Feb 2009 17:24:46 +0000 (12:24 -0500)
We have to make sure the DMA channel is actually disabled in hardware before
attempting to reprogram it.  Otherwise the new settings are ignored and we
end up with random hangs/failures.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
lib_blackfin/string.c

index 36eecdff4c5b498f176ce705928494231f1aa9f1..e4587184465aaefef1723cd4a712cbbc52b043d6 100644 (file)
@@ -136,6 +136,14 @@ int strncmp(const char *cs, const char *ct, size_t count)
  */
 void dma_memcpy_nocache(void *dst, const void *src, size_t count)
 {
+       /* Disable DMA in case it's still running (older u-boot's did not
+        * always turn them off).  Do it before the if statement below so
+        * we can be cheap and not do a SSYNC() due to the forced abort.
+        */
+       bfin_write_MDMA_D0_CONFIG(0);
+       bfin_write_MDMA_S0_CONFIG(0);
+       bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
+
        /* Scratchpad cannot be a DMA source or destination */
        if (((unsigned long)src >= L1_SRAM_SCRATCH &&
             (unsigned long)src < L1_SRAM_SCRATCH_END) ||
@@ -143,10 +151,6 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
             (unsigned long)dst < L1_SRAM_SCRATCH_END))
                hang();
 
-       bfin_write_MDMA_S0_CONFIG(0);
-       bfin_write_MDMA_D0_CONFIG(0);
-       bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
-
        /* Copy sram functions from sdram to sram */
        /* Setup destination start address */
        bfin_write_MDMA_D0_START_ADDR(dst);
@@ -164,14 +168,13 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
 
        /* Enable source DMA */
        bfin_write_MDMA_S0_CONFIG(DMAEN);
-
-       bfin_write_MDMA_D0_CONFIG(WNR | DMAEN);
+       bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | DI_EN);
        SSYNC();
 
-       while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN)
+       while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
                continue;
 
-       bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_RUN | DMA_DONE | DMA_ERR);
+       bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
        bfin_write_MDMA_D0_CONFIG(0);
        bfin_write_MDMA_S0_CONFIG(0);
 }