mx27: add missing constant for mx27
authortrem <tremyfr@yahoo.fr>
Fri, 6 Sep 2013 15:33:45 +0000 (17:33 +0200)
committerStefano Babic <sbabic@denx.de>
Tue, 10 Sep 2013 17:12:55 +0000 (19:12 +0200)
Add some missing constant (chip select, ...)

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Acked-by: Stefano Babic <sbabic@denx.de>
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
arch/arm/include/asm/arch-mx27/imx-regs.h

index 8db2a67f37a185c406541895fcd5faaea61645f9..629b7277454478e1a300d265db5428f37f0f52a5 100644 (file)
@@ -38,5 +38,10 @@ int main(void)
        DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
        DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
 
+       DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
+               offsetof(struct system_control_regs, gpcr));
+       DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
+               offsetof(struct system_control_regs, fmcr));
+
        return 0;
 }
index a27145ba28820436c481f1a04c03657d2c09f467..92c847e44af3a6fbbcdcd49fb3f6f30d7159a8a0 100644 (file)
@@ -169,7 +169,7 @@ struct iim_regs {
        struct fuse_bank {
                u32 fuse_regs[0x20];
                u32 fuse_rsvd[0xe0];
-       } bank[1];
+       } bank[2];
 };
 
 struct fuse_bank0_regs {
@@ -209,9 +209,13 @@ struct fuse_bank0_regs {
 #define IIM_BASE_ADDR          IMX_IIM_BASE
 #define IMX_FEC_BASE           (0x2b000 + IMX_IO_BASE)
 
+#define IMX_NFC_BASE           (0xD8000000)
 #define IMX_ESD_BASE           (0xD8001000)
 #define IMX_WEIM_BASE          (0xD8002000)
 
+#define NFC_BASE_ADDR          IMX_NFC_BASE
+
+
 /* FMCR System Control bit definition*/
 #define UART4_RXD_CTL  (1 << 25)
 #define UART4_RTS_CTL  (1 << 24)