i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10

The pad settings for DISP0_DATA02 and DISP0_DAT10 were not
set in the same way as DISP0_DAT00-23, causing much flicker
in parallel RGB displays on Dual-Lite and Solo processors.

These settings now match the i.MX6 Dual and Quad core versions.

Note that this fixes a regression in commit b47abc3 and that
this is the second time we've had a regression on these two
pads (See commit e654ddf).

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>

diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 2e414adf3d7879ed4df277dbe703f0dcc0fca2f7..1a9604e7106e1b03c0ceb4b75f3536aa6b327deb 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
@@ -158,7 +158,7 @@ MX6_PAD_DECL(DISP0_DAT1__IPU1_DISP0_DATA01, 0x03C8, 0x00B4, 0, 0x0000, 0, PAD_CT
 MX6_PAD_DECL(DISP0_DAT1__LCD_DATA01,   0x03C8, 0x00B4, 1, 0x0000, 0, 0)
 MX6_PAD_DECL(DISP0_DAT1__ECSPI3_MOSI,  0x03C8, 0x00B4, 2, 0x0000, 0, 0)
 MX6_PAD_DECL(DISP0_DAT1__GPIO4_IO22,   0x03C8, 0x00B4, 5, 0x0000, 0, 0)
-MX6_PAD_DECL(DISP0_DAT10__IPU1_DISP0_DATA10,   0x03CC, 0x00B8, 0, 0x0000, 0, 0)
+MX6_PAD_DECL(DISP0_DAT10__IPU1_DISP0_DATA10,   0x03CC, 0x00B8, 0, 0x0000, 0, PAD_CTL_DSE_120ohm)
 MX6_PAD_DECL(DISP0_DAT10__LCD_DATA10,  0x03CC, 0x00B8, 1, 0x0000, 0, PAD_CTL_DSE_120ohm)
 MX6_PAD_DECL(DISP0_DAT10__GPIO4_IO31,  0x03CC, 0x00B8, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(DISP0_DAT11__IPU1_DISP0_DATA11,   0x03D0, 0x00BC, 0, 0x0000, 0, PAD_CTL_DSE_120ohm)
@@ -206,7 +206,7 @@ MX6_PAD_DECL(DISP0_DAT19__AUD5_RXD, 0x03F0, 0x00DC, 3, 0x07B0, 0, 0)
 MX6_PAD_DECL(DISP0_DAT19__AUD4_RXC,    0x03F0, 0x00DC, 4, 0x07A0, 0, 0)
 MX6_PAD_DECL(DISP0_DAT19__GPIO5_IO13,  0x03F0, 0x00DC, 5, 0x0000, 0, 0)
 MX6_PAD_DECL(DISP0_DAT19__EIM_CS3_B,   0x03F0, 0x00DC, 7, 0x0000, 0, 0)
-MX6_PAD_DECL(DISP0_DAT2__IPU1_DISP0_DATA02,    0x03F4, 0x00E0, 0, 0x0000, 0, 0)
+MX6_PAD_DECL(DISP0_DAT2__IPU1_DISP0_DATA02,    0x03F4, 0x00E0, 0, 0x0000, 0, PAD_CTL_DSE_120ohm)
 MX6_PAD_DECL(DISP0_DAT2__LCD_DATA02,   0x03F4, 0x00E0, 1, 0x0000, 0, 0)
 MX6_PAD_DECL(DISP0_DAT2__ECSPI3_MISO,  0x03F4, 0x00E0, 2, 0x0000, 0, 0)
 MX6_PAD_DECL(DISP0_DAT2__GPIO4_IO23,   0x03F4, 0x00E0, 5, 0x0000, 0, 0)