#define PWM_DIVIDER_SHIFT 0
#define PWM_DIVIDER_MASK (0x1FFF << PWM_DIVIDER_SHIFT)
-#ifndef CONFIG_PWM
-/**
- * Program the PWM with the given parameters.
- *
- * @param channel PWM channel to update
- * @param rate Clock rate to use for PWM, or 0 to leave alone
- * @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high,
- * n = n/256 pulse high
- * @param freq_divider frequency divider value (1 to use rate as is)
- */
-void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider);
-
-/**
- * Request a pwm channel as referenced by a device tree node.
- *
- * This channel can then be passed to pwm_enable().
- *
- * @param blob Device tree blob
- * @param node Node containing reference to pwm
- * @param prop_name Property name of pwm reference
- * @return channel number, if ok, else -1
- */
-int pwm_request(const void *blob, int node, const char *prop_name);
-
-/**
- * Set up the pwm controller, by looking it up in the fdt.
- *
- * @return 0 if ok, -1 if the device tree node was not found or invalid.
- */
-int pwm_init(const void *blob);
-#endif
-
#endif /* __ASM_ARCH_TEGRA_PWM_H */
obj-y += cpu.o
else
obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
-obj-$(CONFIG_PWM_TEGRA) += pwm.o
endif
obj-$(CONFIG_ARM64) += arm64-mmu.o
#include <linux/sizes.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#ifdef CONFIG_LCD
-#include <asm/arch/display.h>
-#endif
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/pmu.h>
-#ifdef CONFIG_PWM_TEGRA
-#include <asm/arch/pwm.h>
-#endif
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/ap.h>
#include <asm/arch-tegra/board.h>
#endif
/* Init is handled automatically in the driver-model case */
-#if defined(CONFIG_PWM_TEGRA) && !defined(CONFIG_PWM)
- if (pwm_init(gd->fdt_blob))
- debug("%s: Failed to init pwm\n", __func__);
-#endif
-#if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO)
+#if defined(CONFIG_DM_VIDEO)
pin_mux_display();
-#endif
-#ifdef CONFIG_LCD
- tegra_lcd_check_next_stage(gd->fdt_blob, 0);
#endif
/* boot param addr */
gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
pin_mux_usb();
#endif
-#if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO)
+#if defined(CONFIG_DM_VIDEO)
board_id = tegra_board_id();
err = tegra_lcd_pmic_init(board_id);
if (err)
return err;
#endif
-#ifdef CONFIG_LCD
- tegra_lcd_check_next_stage(gd->fdt_blob, 0);
-#endif
#ifdef CONFIG_TEGRA_NAND
pin_mux_nand();
/* Initialize periph GPIOs */
gpio_early_init();
gpio_early_init_uart();
-#ifdef CONFIG_LCD
- tegra_lcd_early_init(gd->fdt_blob);
-#endif
return 0;
}
int board_late_init(void)
{
-#ifdef CONFIG_LCD
- /* Make sure we finish initing the LCD */
- tegra_lcd_check_next_stage(gd->fdt_blob, 1);
-#endif
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
if (tegra_cpu_is_non_secure()) {
printf("CPU is in NS mode\n");
+++ /dev/null
-/*
- * Tegra pulse width frequency modulator definitions
- *
- * Copyright (c) 2011 The Chromium OS Authors.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <fdtdec.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/pwm.h>
-
-struct pwm_info {
- struct pwm_ctlr *pwm; /* Registers for our pwm controller */
- int pwm_node; /* PWM device tree node */
-} local;
-
-void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider)
-{
- u32 reg;
-
- assert(channel < PWM_NUM_CHANNELS);
-
- /* TODO: Can we use clock_adjust_periph_pll_div() here? */
- if (rate) {
- clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ,
- rate);
- }
-
- reg = PWM_ENABLE_MASK;
- reg |= pulse_width << PWM_WIDTH_SHIFT;
- reg |= freq_divider << PWM_DIVIDER_SHIFT;
- writel(reg, &local.pwm[channel].control);
- debug("%s: channel=%d, rate=%d\n", __func__, channel, rate);
-}
-
-int pwm_request(const void *blob, int node, const char *prop_name)
-{
- int pwm_node;
- u32 data[3];
-
- if (fdtdec_get_int_array(blob, node, prop_name, data,
- ARRAY_SIZE(data))) {
- debug("%s: Cannot decode PWM property '%s'\n", __func__,
- prop_name);
- return -1;
- }
-
- pwm_node = fdt_node_offset_by_phandle(blob, data[0]);
- if (pwm_node != local.pwm_node) {
- debug("%s: PWM property '%s' phandle %d not recognised"
- "- expecting %d\n", __func__, prop_name, data[0],
- local.pwm_node);
- return -1;
- }
- if (data[1] >= PWM_NUM_CHANNELS) {
- debug("%s: PWM property '%s': invalid channel %u\n", __func__,
- prop_name, data[1]);
- return -1;
- }
-
- /*
- * TODO: We could maintain a list of requests, but it might not be
- * worth it for U-Boot.
- */
- return data[1];
-}
-
-int pwm_init(const void *blob)
-{
- local.pwm_node = fdtdec_next_compatible(blob, 0,
- COMPAT_NVIDIA_TEGRA20_PWM);
- if (local.pwm_node < 0) {
- debug("%s: Cannot find device tree node\n", __func__);
- return -1;
- }
-
- local.pwm = (struct pwm_ctlr *)fdtdec_get_addr(blob, local.pwm_node,
- "reg");
- if (local.pwm == (struct pwm_ctlr *)FDT_ADDR_T_NONE) {
- debug("%s: Cannot find pwm reg address\n", __func__);
- return -1;
- }
- debug("Tegra PWM at %p, node %d\n", local.pwm, local.pwm_node);
-
- return 0;
-}