rockchip: dts: Add mipi dsi support for rk3399

Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 77b452198186a1da7db4bced0e2330f665f38161..f5af75bff448addbd7e8891254314ec3825eebf3 100644 (file)
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -66,6 +66,59 @@
                clock-output-names = "clkin_gmac";
                #clock-cells = <0>;
        };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               power-supply = <&vccsys>;
+               enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+               brightness-levels = <
+                         0   1   2   3   4   5   6   7
+                         8   9  10  11  12  13  14  15
+                        16  17  18  19  20  21  22  23
+                        24  25  26  27  28  29  30  31
+                        32  33  34  35  36  37  38  39
+                        40  41  42  43  44  45  46  47
+                        48  49  50  51  52  53  54  55
+                        56  57  58  59  60  61  62  63
+                        64  65  66  67  68  69  70  71
+                        72  73  74  75  76  77  78  79
+                        80  81  82  83  84  85  86  87
+                        88  89  90  91  92  93  94  95
+                        96  97  98  99 100 101 102 103
+                       104 105 106 107 108 109 110 111
+                       112 113 114 115 116 117 118 119
+                       120 121 122 123 124 125 126 127
+                       128 129 130 131 132 133 134 135
+                       136 137 138 139 140 141 142 143
+                       144 145 146 147 148 149 150 151
+                       152 153 154 155 156 157 158 159
+                       160 161 162 163 164 165 166 167
+                       168 169 170 171 172 173 174 175
+                       176 177 178 179 180 181 182 183
+                       184 185 186 187 188 189 190 191
+                       192 193 194 195 196 197 198 199
+                       200 201 202 203 204 205 206 207
+                       208 209 210 211 212 213 214 215
+                       216 217 218 219 220 221 222 223
+                       224 225 226 227 228 229 230 231
+                       232 233 234 235 236 237 238 239
+                       240 241 242 243 244 245 246 247
+                       248 249 250 251 252 253 254 255>;
+               default-brightness-level = <200>;
+               pwms = <&pwm0 0 25000 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm0_pin>;
+               pwm-delay-us = <10000>;
+               status = "disabled";
+       };
+
+       panel:panel {
+               compatible = "simple-panel";
+               power-supply = <&vcc33_lcd>;
+               backlight = <&backlight>;
+               /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+               status = "disabled";
+       };
 };
 
 &emmc_phy {
@@ -148,6 +201,7 @@
                status = "okay";
 
                vcc12-supply = <&vcc3v3_sys>;
+
                regulators {
                        vcc33_lcd: SWITCH_REG2 {
                                regulator-always-on;
@@ -158,6 +212,29 @@
        };
 };
 
+&mipi_dsi {
+       status = "disabled";
+       rockchip,panel = <&panel>;
+       display-timings {
+               timing0 {
+               bits-per-pixel = <24>;
+               clock-frequency = <160000000>;
+               hfront-porch = <120>;
+               hsync-len = <20>;
+               hback-porch = <21>;
+               hactive = <1200>;
+               vfront-porch = <21>;
+               vsync-len = <3>;
+               vback-porch = <18>;
+               vactive = <1920>;
+               hsync-active = <0>;
+               vsync-active = <0>;
+               de-active = <1>;
+               pixelclk-active = <0>;
+               };
+       };
+};
+
 &pinctrl {
        pmic {
                pmic_int_l: pmic-int-l {

diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index bafa40a1f92be06552b212719336eeb2afd7891b..f3d3f53f7ae08db25163139e88762e2567779968 100644 (file)
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1402,6 +1402,77 @@
                status = "disabled";
        };
 
+       vopl: vop@ff8f0000 {
+               u-boot,dm-pre-reloc;
+               compatible = "rockchip,rk3399-vop-lit";
+               reg = <0x0 0xff8f0000 0x0 0x3efc>;
+               interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
+               clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+               resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
+               reset-names = "axi", "ahb", "dclk";
+               status = "disabled";
+               vopl_out: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       vopl_out_mipi: endpoint@0 {
+                               reg = <3>;
+                               remote-endpoint = <&mipi_in_vopl>;
+                       };
+               };
+       };
+
+       vopb: vop@ff900000 {
+               u-boot,dm-pre-reloc;
+               compatible = "rockchip,rk3399-vop-big";
+               reg = <0x0 0xff900000 0x0 0x3efc>;
+               interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
+               #clock-cells = <0>;
+               clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+               resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>;
+               reset-names = "axi", "ahb", "dclk";
+               status = "disabled";
+               vopb_out: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       vopb_out_mipi: endpoint@0 {
+                               reg = <3>;
+                               remote-endpoint = <&mipi_in_vopb>;
+                       };
+               };
+       };
+
+       mipi_dsi: mipi@ff960000 {
+               compatible = "rockchip,rk3399_mipi_dsi";
+               reg = <0x0 0xff960000 0x0 0x8000>;
+               interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+                        <&cru SCLK_DPHY_TX0_CFG>;
+               clock-names = "ref", "pclk", "phy_cfg";
+               rockchip,grf = <&grf>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+                       mipi_in: port {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               mipi_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_mipi>;
+                               };
+                               mipi_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_mipi>;
+                               };
+                       };
+               };
+       };
+
        pinctrl: pinctrl {
                u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3399-pinctrl";