rockchip: Fix the configuration for chromebook_jerry
authorSimon Glass <sjg@chromium.org>
Tue, 29 Dec 2015 12:22:45 +0000 (05:22 -0700)
committerSimon Glass <sjg@chromium.org>
Fri, 8 Jan 2016 14:59:07 +0000 (07:59 -0700)
Various updates did not make it through to this board. Also the instructions
for building a SPI image are no-longer correct. Fix these so that Jerry can
boot to a prompt again.

Signed-off-by: Simon Glass <sjg@chromium.org>
configs/chromebook_jerry_defconfig
doc/README.rockchip
include/configs/chromebook_jerry.h

index da4770771f08c63bacf811aeecbb39c4d42a8e69..a515d8d580032ceeaf846a8f2a3cdc9d3568c6e0 100644 (file)
@@ -27,7 +27,9 @@ CONFIG_RESET=y
 CONFIG_DM_MMC=y
 CONFIG_ROCKCHIP_DWMMC=y
 CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
 CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_ROCKCHIP_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
@@ -41,5 +43,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+CONFIG_ROCKCHIP_SPI=y
index b455f6fee703272f8ae00c035479dc540286c9a6..9a2ebca95df668cc11af1858d8877b1bc00df6a3 100644 (file)
@@ -135,9 +135,10 @@ Booting from SPI
 
 To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
 
-   ./chromebook_jerry/tools/mkimage -n rk3036 -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out
-   dd if=spl.bin of=out.bin bs=128K conv=sync
-   cat chromebook_jerry/u-boot-dtb.img out.bin
+   ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
+       -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
+   dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
+   cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
    dd if=out.bin of=out.bin.pad bs=4M conv=sync
 
 This converts the SPL image to the required SPI format by adding the Rockchip
index 058325c0b4941237e000b92053ee3f3377ebd4b3..e29d77695be0dcc30f2d35bc26680d759a5e077a 100644 (file)
@@ -13,5 +13,6 @@
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPI_FLASH_GIGADEVICE
 
 #endif