Add support for TP-Link TL-WR841N/D v11 (v10 clone, different GPIO LED configuration)

diff --git a/Makefile b/Makefile
index 319b888aaf8c63fb36b58f1804dc57402c1b80da..c91b21990559c46626de73b6ffd8d1b2adf20bab 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -210,6 +210,7 @@ COMMON_ETHS27_TARGETS = \
        tp-link_tl-wr802n \
        tp-link_tl-wr820n_CN \
        tp-link_tl-wr841n_v10 \
+       tp-link_tl-wr841n_v11 \
        tp-link_tl-wr841n_v8 \
        tp-link_tl-wr841n_v9
 

diff --git a/u-boot/Makefile b/u-boot/Makefile
index cbb40b8cd421e7ba9217587fcf16b984ce9cd167..648690bb3ecb934c4a988b5293d3a636e6777302 100644 (file)
--- a/u-boot/Makefile
+++ b/u-boot/Makefile
@@ -556,6 +556,13 @@ tp-link_tl-wr841n_v10: qca953x_common
        @$(call define_add,CFG_ATH_GMAC_NMACS,2)
        @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
 
+tp-link_tl-wr841n_v11: qca953x_common
+       @$(call config_init,TP-Link TL-WR841N/D v11,tl-wr841nd-v11,4,12,1,QCA_QCA953X_SOC)
+       @$(call define_add,CONFIG_FOR_TPLINK_WR841N_V11,1)
+       @$(call define_add,CFG_ATHRS27_PHY,1)
+       @$(call define_add,CFG_ATH_GMAC_NMACS,2)
+       @$(MKCONFIG) -a ap143 mips mips ap143 ar7240 ar7240
+
 tp-link_tl-wr841n_v8: ar934x_common
        @$(call config_init,TP-Link TL-WR841N/D v8,tl-wr841nd-v8,4,17,1,QCA_AR9341_SOC)
        @$(call define_add,CONFIG_FOR_TPLINK_WR841N_V8,1)

diff --git a/u-boot/include/configs/ap143.h b/u-boot/include/configs/ap143.h
index ead9ce80900d3d3d1cfab3e96ed1f6532d7b83ff..2a5615d1950258db43db07d04670fe53f756e9bc 100644 (file)
--- a/u-boot/include/configs/ap143.h
+++ b/u-boot/include/configs/ap143.h
@@ -65,6 +65,15 @@
        #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
        #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 
+#elif defined(CONFIG_FOR_TPLINK_WR841N_V11)
+
+       #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO2  | GPIO3  |\
+                                               GPIO4  | GPIO11 | GPIO13 |\
+                                               GPIO14 | GPIO15 | GPIO16
+       #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
+       #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
+       #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
+
 #elif defined(CONFIG_FOR_WALLYS_DR531)
 
        #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
@@ -117,6 +126,7 @@
                                "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 
 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+      defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
       defined(CONFIG_FOR_TPLINK_WR802N)
 
@@ -151,6 +161,7 @@
     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
+    defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CFG_LOAD_ADDR   0x9F020000
 #elif defined(CONFIG_FOR_WALLYS_DR531)
@@ -177,6 +188,7 @@
 #elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+      defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define CFG_ENV_ADDR            0x9F01EC00
        #define CFG_ENV_SIZE            0x1000
@@ -216,6 +228,7 @@
 #elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
+      defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
       defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define OFFSET_MAC_DATA_BLOCK           0x010000
        #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
@@ -272,6 +285,7 @@
     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
+    defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)
        #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 #elif defined(CONFIG_FOR_WALLYS_DR531)  ||\
@@ -300,6 +314,7 @@
     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
+    defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 
        #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000