arc: add dependences on MMU presence

Depending on MMU presence in CPU there're differences in HW behavior.
For example address of instruction that caused exception is put in
ECR register if MMU exists and in ERET register otherwise.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>

diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index e408800a919b36bc4bd64252c6b4b4602bf62118..5321987a566387ffcaeae4c0d51dfa8801f75351 100644 (file)
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -21,6 +21,10 @@ ifeq ($(CROSS_COMPILE),)
 CROSS_COMPILE := $(ARC_CROSS_COMPILE)
 endif
 
+ifdef CONFIG_ARC_MMU_VER
+CONFIG_MMU = 1
+endif
+
 PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
 
 # Needed for relocation

diff --git a/arch/arc/cpu/arc700/start.S b/arch/arc/cpu/arc700/start.S
index 4d505bfb7ca442a937d7caf196afdc4e3b961f8d..2318282bf404a6302fbe979c32f8a41c2e879f0f 100644 (file)
--- a/arch/arc/cpu/arc700/start.S
+++ b/arch/arc/cpu/arc700/start.S
@@ -78,6 +78,16 @@
        PUSHAX  %erbta
 .endm
 
+.macro SAVE_EXCEPTION_SOURCE
+#ifdef CONFIG_MMU
+       /* If MMU exists exception faulting address is loaded in EFA reg */
+       lr      %r0, [%efa]
+#else
+       /* Otherwise in ERET (exception return) reg */
+       lr      %r0, [%eret]
+#endif
+.endm
+
 .align 4
 .globl _start
 _start:
@@ -102,13 +112,13 @@ _start:
 
 memory_error:
        SAVE_ALL_SYS
-       lr      %r0, [%efa]
+       SAVE_EXCEPTION_SOURCE
        mov     %r1, %sp
        j       do_memory_error
 
 instruction_error:
        SAVE_ALL_SYS
-       lr      %r0, [%efa]
+       SAVE_EXCEPTION_SOURCE
        mov     %r1, %sp
        j       do_instruction_error
 
@@ -119,7 +129,7 @@ interrupt_handler:
 
 EV_MachineCheck:
        SAVE_ALL_SYS
-       lr      %r0, [%efa]
+       SAVE_EXCEPTION_SOURCE
        mov     %r1, %sp
        j       do_machine_check_fault
 
@@ -135,7 +145,7 @@ EV_TLBMissD:
 
 EV_TLBProtV:
        SAVE_ALL_SYS
-       lr      %r0, [%efa]
+       SAVE_EXCEPTION_SOURCE
        mov     %r1, %sp
        j       do_tlb_prot_violation