Updated usb regs (markdown)

diff --git a/usb-regs.md b/usb-regs.md
index 54b68cee0e1af90145aeff8cd0963532823f51e2..1b2880bb26767b018846357b8bcd19059dc35a20 100644 (file)
--- a/usb-regs.md
+++ b/usb-regs.md
@@ -126,21 +126,24 @@ These bits indicate if fallowing groups got some interrupt.
 * BIT1 - USB EP0 IN/tx interrupt
 * BIT0 - ep0 SETUP
 
-# 0x22 ZM_INTR_SOURCE_1_OFFSET
-# 0x23 ZM_INTR_SOURCE_2_OFFSET
-short packed interrupts?  
-
-# 0x24 ZM_INTR_SOURCE_3_OFFSET
-# 0x25 ZM_INTR_SOURCE_4_OFFSET
-* BIT7 - End of data.
-* BIT6 - vUsb_Reg_Out(). Pending data in fifo for EP4. We need to read it out.
-Comments: we can read only 64bytes per time. If pending data is less then 64bytes or it is end of packet, then BIT6 and BIT7 will be set. If not, then only BIT6 is set. 
-
-# 0x26 ZM_INTR_SOURCE_5_OFFSET
-these endpoints are handled by DMA  
-
-# 0x27 ZM_INTR_SOURCE_6_OFFSET
-* BIT6 - vUsb_Status_In()?
+# 0x22 - 0x25 ZM_INTR_SOURCE_1_OFFSET (FIFOx OUT)
+....
+* BIT1 - FIFO0 OUT - short packet
+* BIT0 - FIFO0 OUT - data
+
+### 0x25 ZM_INTR_SOURCE_4_OFFSET
+* BIT7 - FIFO15 OUT - short packet.
+* BIT6 - FIFO15 OUT - vUsb_Reg_Out(). Pending data in fifo for EP4. We need to read it out.
+* BIT4 - FIFO14 OUT
+* BIT2 - FIFO13 OUT
+* BIT0 - FIFO12 OUT
+Comments: we can read only 64bytes per time. If pending data is less then 64bytes, then BIT6 and BIT7 will be set. If not, then only BIT6 is set. 
+
+# 0x26 - 0x27 ZM_INTR_SOURCE_5_OFFSET (FIFOx IN)
+* BIT1 - FIFO1 IN
+* BIT0 - FIFO0 IN 
+### 0x27 ZM_INTR_SOURCE_6_OFFSET
+* BIT6 - FIFO14 IN - vUsb_Status_In()
 
 # 0x28 ZM_INTR_SOURCE_7_OFFSET
 * BIT7 - RX0BTYE_INT