Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry
authorTom Warren <twarren@nvidia.com>
Fri, 18 Jan 2013 20:36:26 +0000 (13:36 -0700)
committerTom Warren <twarren@nvidia.com>
Mon, 11 Feb 2013 17:35:23 +0000 (10:35 -0700)
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/cpu/arm720t/tegra-common/cpu.c
arch/arm/include/asm/arch-tegra/tegra.h

index 693d584d37d4e5ec3aeb4913349cdd156ecaecbe..c32925bddce549643f2a05a8869d9020f266ffe8 100644 (file)
@@ -75,13 +75,6 @@ struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = {
         { 700, 6, 0, 8},
         { 700, 13, 0, 8},
        },
-
-       /* TEGRA_SOC2_SLOW: 312 MHz */
-       {{ 312, 13, 0, 12},     /* OSC 13M */
-        { 260, 16, 0, 8},      /* OSC 19.2M */
-        { 312, 12, 0, 12},     /* OSC 12M */
-        { 312, 26, 0, 12},     /* OSC 26M */
-       },
 };
 
 void adjust_pllp_out_freqs(void)
index 953936c0836976f0d9602c146308e6af25a47ab5..013a3c5ce2013e498804581d696aca8f98556321 100644 (file)
@@ -85,7 +85,6 @@ enum {
        TEGRA_SOC_T20,
        TEGRA_SOC_T25,
        TEGRA_SOC_T30,
-       TEGRA_SOC2_SLOW,        /* T2x needs to run at slow clock initially */
 
        TEGRA_SOC_CNT,
        TEGRA_SOC_UNKNOWN       = -1,