config: peach: Correct memory layout environment settings
authorSjoerd Simons <sjoerd.simons@collabora.co.uk>
Thu, 12 Mar 2015 21:33:29 +0000 (22:33 +0100)
committerMinkyu Kang <mk7.kang@samsung.com>
Mon, 6 Apr 2015 05:21:29 +0000 (14:21 +0900)
The peach boards have their SDRAM start address at 0x20000000 instead of
0x40000000 which seems common for all other exynos5 based boards. This
means the layout set in exynos5-common.h causes the kernel be loaded
more then 128MB (at 0x42000000) away from memory start which breaks
booting kernels with CONFIG_AUTO_ZRELADDR

Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses
the same offsets from start of memory as the common exynos5 settings.

This fixes booting via bootz and PXE

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
include/configs/peach-pi.h
include/configs/peach-pit.h

index f04f0613aac23d57a41b93a0fcfeecec8b7fd5f0..e3cb09e3d51b524069562788c9b659a5c80b0738 100644 (file)
 #define CONFIG_ENV_OFFSET      (FLASH_SIZE - CONFIG_BL2_SIZE)
 #define CONFIG_SPI_BOOTING
 
+#define MEM_LAYOUT_ENV_SETTINGS \
+       "bootm_size=0x10000000\0" \
+       "kernel_addr_r=0x22000000\0" \
+       "fdt_addr_r=0x23000000\0" \
+       "ramdisk_addr_r=0x23300000\0" \
+       "scriptaddr=0x30000000\0" \
+       "pxefile_addr_r=0x31000000\0"
+
 #include <configs/exynos5420-common.h>
 #include <configs/exynos5-dt-common.h>
 
index b5efbdcaa66a85de4c1864e465ea0adf289e0cf0..3ee42ef2c8b6aa8eaecc7111a640bf5de3792b40 100644 (file)
 #define CONFIG_ENV_OFFSET      (FLASH_SIZE - CONFIG_BL2_SIZE)
 #define CONFIG_SPI_BOOTING
 
+#define MEM_LAYOUT_ENV_SETTINGS \
+       "bootm_size=0x10000000\0" \
+       "kernel_addr_r=0x22000000\0" \
+       "fdt_addr_r=0x23000000\0" \
+       "ramdisk_addr_r=0x23300000\0" \
+       "scriptaddr=0x30000000\0" \
+       "pxefile_addr_r=0x31000000\0"
+
 #include <configs/exynos5420-common.h>
 #include <configs/exynos5-dt-common.h>