MX31: Add USB Host support to the QONG board
authorStefano Babic <sbabic@denx.de>
Tue, 5 Oct 2010 12:05:11 +0000 (14:05 +0200)
committerStefano Babic <sbabic@denx.de>
Wed, 13 Oct 2010 16:11:55 +0000 (18:11 +0200)
Signed-off-by: Stefano Babic <sbabic@denx.de>
board/davedenx/qong/qong.c
include/configs/qong.h

index efeb0bb6bcaa7b8295d3e405a53015832ed7f587..8a81cfc68615617b63c55ef1de496d3a1d9c9c0c 100644 (file)
@@ -25,6 +25,7 @@
 #include <netdev.h>
 #include <asm/arch/mx31.h>
 #include <asm/arch/mx31-regs.h>
+#include <asm/io.h>
 #include <nand.h>
 #include <fsl_pmic.h>
 #include <mxc_gpio.h>
@@ -97,6 +98,38 @@ int board_early_init_f (void)
        mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
        mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
 
+       /* Setup pins for USB2 Host */
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_CLK, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DIR, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_NXT, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_STP, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA0, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA1, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD3, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD3, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SCK3, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SFS3, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD6, MUX_CTL_FUNC));
+       mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD6, MUX_CTL_FUNC));
+
+#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
+                       PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+
+       mx31_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
+       mx31_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
+       mx31_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
+       mx31_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
+       mx31_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
+       mx31_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
+       mx31_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG);       /* USBH2_DATA2 */
+       mx31_set_pad(MX31_PIN_STXD6, H2_PAD_CFG);       /* USBH2_DATA3 */
+       mx31_set_pad(MX31_PIN_SFS3, H2_PAD_CFG);        /* USBH2_DATA4 */
+       mx31_set_pad(MX31_PIN_SCK3, H2_PAD_CFG);        /* USBH2_DATA5 */
+       mx31_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG);       /* USBH2_DATA6 */
+       mx31_set_pad(MX31_PIN_STXD3, H2_PAD_CFG);       /* USBH2_DATA7 */
+
+       writel(readl((IOMUXC_BASE + 0x8)) | (1 << 11), IOMUXC_BASE + 0x8);
+
        return 0;
 
 }
index 0465ff4b88298b44fa5d803c477ccacacf7bca9e..b1aca93ddead16f5bf6a0c9ffb77f13768b6e9a7 100644 (file)
 #define CONFIG_BMP_16BPP
 #define CONFIG_DISPLAY_COM57H5M10XRC
 
+/* USB */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI                        /* Enable EHCI USB support */
+#define CONFIG_USB_EHCI_MXC
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_MXC_USB_PORT    2
+#define CONFIG_MXC_USB_PORTSC  (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT)
+#define CONFIG_MXC_USB_FLAGS   MXC_EHCI_POWER_PINS_ENABLED
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SUPPORT_VFAT
+#define CONFIG_CMD_FAT
+#endif /* CONFIG_CMD_USB */
+
 /*
  * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
  * initial TFTP transfer, should the user wish one, significantly.
@@ -250,7 +266,7 @@ extern int qong_nand_rdy(void *chip);
 #define        CONFIG_ENV_IS_IN_FLASH  1
 #define CONFIG_ENV_SECT_SIZE   0x20000
 #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
-#define CONFIG_ENV_ADDR                (CONFIG_SYS_FLASH_BASE + 0x60000)
+#define CONFIG_ENV_ADDR                (CONFIG_SYS_FLASH_BASE + 0x80000)
 
 /* Address and size of Redundant Environment Sector    */
 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)