powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL

LAW init is skipped in the SPL payload because it's assumed that the SPL
has taken care of it -- so make sure the SPL loads all the LAWs as is
done on other boards.

This bug was introduced by:

  commit 4589728e214958a4e6e011a081a68d360c49d7a5
  Author: Kumar Gala <galak@kernel.crashing.org>
  Date:   Fri Nov 11 08:14:53 2011 -0600

    powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND

    Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
    LAW entries not needed during SPL phase.

Signed-off-by: Scott Wood <scottwood@freescale.com>

diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 79689199c12f5d9a0bfc41daf8f5cffed1432274..0da8300c6f56fa52acd066070e79f693544ea0ed 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -25,12 +25,10 @@
 #include <asm/mmu.h>
 
 struct law_entry law_table[] = {
-#ifndef CONFIG_NAND_SPL
        SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
        SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
 #ifdef CONFIG_VSC7385_ENET
        SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
-#endif
 #endif
        SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
 #ifdef CONFIG_SYS_NAND_BASE_PHYS