ARM DaVinci: EMIF settings

NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.

Without this patch, EMIF configurations made in board_init()
will be invalidated.

Signed-off-by: Thomas Lange <thomas@corelatus.se>

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index a974667dc94661441c12fb13667a2d1b36a15ab0..8ef18b8124403fecd3bd6789e1bb7fee3c186249 100644 (file)
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -386,9 +386,6 @@ static int nand_davinci_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
 static void nand_flash_init(void)
 {
        u_int32_t       acfg1 = 0x3ffffffc;
-       u_int32_t       acfg2 = 0x3ffffffc;
-       u_int32_t       acfg3 = 0x3ffffffc;
-       u_int32_t       acfg4 = 0x3ffffffc;
        emifregs        emif_regs;
 
        /*------------------------------------------------------------------*
@@ -413,12 +410,9 @@ static void nand_flash_init(void)
 
        emif_regs = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE;
 
-       emif_regs->AWCCR |= 0x10000000;
-       emif_regs->AB1CR = acfg1;       /* 0x08244128 */;
-       emif_regs->AB2CR = acfg2;
-       emif_regs->AB3CR = acfg3;
-       emif_regs->AB4CR = acfg4;
-       emif_regs->NANDFCR = 0x00000101;
+       emif_regs->AB1CR = acfg1; /* CS2 */
+
+       emif_regs->NANDFCR = 0x00000101; /* NAND flash on CS2 */
 }
 
 int board_nand_init(struct nand_chip *nand)