hrcon: Use generic ioep-fpga support
authorDirk Eibach <dirk.eibach@gdsys.cc>
Wed, 28 Oct 2015 10:46:33 +0000 (11:46 +0100)
committerTom Rini <trini@konsulko.com>
Thu, 12 Nov 2015 23:04:09 +0000 (18:04 -0500)
The strider platform moved some generic code into ioep-fpga.c.
Make use of that on hrcon platform.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
board/gdsys/common/Makefile
board/gdsys/common/ioep-fpga.c
board/gdsys/mpc8308/hrcon.c

index ba48e8b9f30023d2aea4f0268f358b95f88c10fc..0aa1849758612ea3f2edbeef8ce318a6cda9fc85 100644 (file)
@@ -12,6 +12,6 @@ obj-$(CONFIG_IO64) += miiphybb.o
 obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o ch7301.o
 obj-$(CONFIG_DLVISION_10G) += osd.o dp501.o
 obj-$(CONFIG_CONTROLCENTERD) += dp501.o
-obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o
+obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o
 obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
 obj-$(CONFIG_STRIDER_CON) += osd.o
index 18d37dcb4156f0f58e794c22287d7f5a87c8fd13..96f02d68ede3551e34beeda5a42ea1ee9f081f01 100644 (file)
@@ -43,6 +43,7 @@ enum {
 enum {
        RAM_DDR2_32 = 0,
        RAM_DDR3_32 = 1,
+       RAM_DDR3_48 = 2,
 };
 
 enum {
@@ -215,6 +216,10 @@ void ioep_fpga_print_info(unsigned int fpga)
                printf(", RAM 32 bit DDR3");
                break;
 
+       case RAM_DDR3_48:
+               printf(", RAM 48 bit DDR3");
+               break;
+
        default:
                printf(", RAM %d(not supported)", feature_ramconfig);
                break;
index e4434b3b6b71c483588010783b0f2261ec997d76..29c85c897e70a5bfe90efdbff7a7d14171f28207 100644 (file)
@@ -22,6 +22,7 @@
 
 #include <gdsys_fpga.h>
 
+#include "../common/ioep-fpga.h"
 #include "../common/osd.h"
 #include "../common/mclink.h"
 #include "../common/phy.h"
@@ -35,57 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define MAX_MUX_CHANNELS 2
 
-enum {
-       UNITTYPE_MAIN_SERVER = 0,
-       UNITTYPE_MAIN_USER = 1,
-       UNITTYPE_VIDEO_SERVER = 2,
-       UNITTYPE_VIDEO_USER = 3,
-};
-
-enum {
-       UNITTYPEPCB_DVI = 0,
-       UNITTYPEPCB_DP_165 = 1,
-       UNITTYPEPCB_DP_300 = 2,
-       UNITTYPEPCB_HDMI = 3,
-};
-
-enum {
-       HWVER_100 = 0,
-       HWVER_110 = 1,
-};
-
-enum {
-       FPGA_HWVER_200 = 0,
-       FPGA_HWVER_210 = 1,
-};
-
-enum {
-       COMPRESSION_NONE = 0,
-       COMPRESSION_TYPE1_DELTA = 1,
-       COMPRESSION_TYPE1_TYPE2_DELTA = 3,
-};
-
-enum {
-       AUDIO_NONE = 0,
-       AUDIO_TX = 1,
-       AUDIO_RX = 2,
-       AUDIO_RXTX = 3,
-};
-
-enum {
-       SYSCLK_147456 = 0,
-};
-
-enum {
-       RAM_DDR2_32 = 0,
-       RAM_DDR3_32 = 1,
-};
-
-enum {
-       CARRIER_SPEED_1G = 0,
-       CARRIER_SPEED_2_5G = 1,
-};
-
 enum {
        MCFPGA_DONE = 1 << 0,
        MCFPGA_INIT_N = 1 << 1,
@@ -164,191 +114,6 @@ int checkboard(void)
        return 0;
 }
 
-static void print_fpga_info(unsigned int fpga, bool rgmii2_present)
-{
-       u16 versions;
-       u16 fpga_version;
-       u16 fpga_features;
-       unsigned unit_type;
-       unsigned unit_type_pcb_video;
-       unsigned hardware_version;
-       unsigned feature_compression;
-       unsigned feature_osd;
-       unsigned feature_audio;
-       unsigned feature_sysclock;
-       unsigned feature_ramconfig;
-       unsigned feature_carrier_speed;
-       unsigned feature_carriers;
-       unsigned feature_video_channels;
-
-       FPGA_GET_REG(fpga, versions, &versions);
-       FPGA_GET_REG(fpga, fpga_version, &fpga_version);
-       FPGA_GET_REG(fpga, fpga_features, &fpga_features);
-
-       unit_type = (versions & 0xf000) >> 12;
-       unit_type_pcb_video = (versions & 0x01c0) >> 6;
-       feature_compression = (fpga_features & 0xe000) >> 13;
-       feature_osd = fpga_features & (1<<11);
-       feature_audio = (fpga_features & 0x0600) >> 9;
-       feature_sysclock = (fpga_features & 0x0180) >> 7;
-       feature_ramconfig = (fpga_features & 0x0060) >> 5;
-       feature_carrier_speed = fpga_features & (1<<4);
-       feature_carriers = (fpga_features & 0x000c) >> 2;
-       feature_video_channels = fpga_features & 0x0003;
-
-       switch (unit_type) {
-       case UNITTYPE_MAIN_USER:
-               printf("Mainchannel");
-               break;
-
-       case UNITTYPE_VIDEO_USER:
-               printf("Videochannel");
-               break;
-
-       default:
-               printf("UnitType %d(not supported)", unit_type);
-               break;
-       }
-
-       if (unit_type == UNITTYPE_MAIN_USER) {
-               hardware_version =
-                         (!!pca9698_get_value(0x20, 24) << 0)
-                       | (!!pca9698_get_value(0x20, 25) << 1)
-                       | (!!pca9698_get_value(0x20, 26) << 2)
-                       | (!!pca9698_get_value(0x20, 27) << 3)
-                       | (!!pca9698_get_value(0x20, 28) << 4);
-               switch (hardware_version) {
-               case HWVER_100:
-                       printf(" HW-Ver 1.00,");
-                       break;
-
-               case HWVER_110:
-                       printf(" HW-Ver 1.10,");
-                       break;
-
-               default:
-                       printf(" HW-Ver %d(not supported),",
-                              hardware_version);
-                       break;
-               }
-               if (rgmii2_present)
-                       printf(" RGMII2,");
-       }
-
-       if (unit_type == UNITTYPE_VIDEO_USER) {
-               hardware_version = versions & 0x000f;
-               switch (hardware_version) {
-               case FPGA_HWVER_200:
-                       printf(" HW-Ver 2.00,");
-                       break;
-
-               case FPGA_HWVER_210:
-                       printf(" HW-Ver 2.10,");
-                       break;
-
-               default:
-                       printf(" HW-Ver %d(not supported),",
-                              hardware_version);
-                       break;
-               }
-       }
-
-       switch (unit_type_pcb_video) {
-       case UNITTYPEPCB_DVI:
-               printf(" DVI,");
-               break;
-
-       case UNITTYPEPCB_DP_165:
-               printf(" DP 165MPix/s,");
-               break;
-
-       case UNITTYPEPCB_DP_300:
-               printf(" DP 300MPix/s,");
-               break;
-
-       case UNITTYPEPCB_HDMI:
-               printf(" HDMI,");
-               break;
-       }
-
-       printf(" FPGA V %d.%02d\n       features:",
-              fpga_version / 100, fpga_version % 100);
-
-
-       switch (feature_compression) {
-       case COMPRESSION_NONE:
-               printf(" no compression");
-               break;
-
-       case COMPRESSION_TYPE1_DELTA:
-               printf(" type1-deltacompression");
-               break;
-
-       case COMPRESSION_TYPE1_TYPE2_DELTA:
-               printf(" type1-deltacompression, type2-inlinecompression");
-               break;
-
-       default:
-               printf(" compression %d(not supported)", feature_compression);
-               break;
-       }
-
-       printf(", %sosd", feature_osd ? "" : "no ");
-
-       switch (feature_audio) {
-       case AUDIO_NONE:
-               printf(", no audio");
-               break;
-
-       case AUDIO_TX:
-               printf(", audio tx");
-               break;
-
-       case AUDIO_RX:
-               printf(", audio rx");
-               break;
-
-       case AUDIO_RXTX:
-               printf(", audio rx+tx");
-               break;
-
-       default:
-               printf(", audio %d(not supported)", feature_audio);
-               break;
-       }
-
-       puts(",\n       ");
-
-       switch (feature_sysclock) {
-       case SYSCLK_147456:
-               printf("clock 147.456 MHz");
-               break;
-
-       default:
-               printf("clock %d(not supported)", feature_sysclock);
-               break;
-       }
-
-       switch (feature_ramconfig) {
-       case RAM_DDR2_32:
-               printf(", RAM 32 bit DDR2");
-               break;
-
-       case RAM_DDR3_32:
-               printf(", RAM 32 bit DDR3");
-               break;
-
-       default:
-               printf(", RAM %d(not supported)", feature_ramconfig);
-               break;
-       }
-
-       printf(", %d carrier(s) %s", feature_carriers,
-              feature_carrier_speed ? "2.5Gbit/s" : "1Gbit/s");
-
-       printf(", %d video channel(s)\n", feature_video_channels);
-}
-
 int last_stage_init(void)
 {
        int slaves;
@@ -401,7 +166,7 @@ int last_stage_init(void)
        slaves = mclink_probe();
        mclink_fpgacount = 0;
 
-       print_fpga_info(0, ch0_rgmii2_present);
+       ioep_fpga_print_info(0);
        osd_probe(0);
 
        if (slaves <= 0)
@@ -412,7 +177,7 @@ int last_stage_init(void)
        for (k = 1; k <= slaves; ++k) {
                FPGA_GET_REG(k, fpga_features, &fpga_features);
 
-               print_fpga_info(k, false);
+               ioep_fpga_print_info(k);
                osd_probe(k);
                if (hw_type_cat) {
                        miiphy_register(bb_miiphy_buses[k].name,